2 * SDL - Simple DirectMedia Layer
3 * CELL BE Support for PS3 Framebuffer
4 * Copyright (C) 2008, 2009 International Business Machines Corporation
6 * This library is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; either version 2.1 of the License, or
9 * (at your option) any later version.
11 * This library is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301
21 * Martin Lowinski <lowinski [at] de [dot] ibm [ibm] com>
22 * Dirk Herrendoerfer <d.herrendoerfer [at] de [dot] ibm [dot] com>
23 * SPE code based on research by:
28 #include "spu_common.h"
30 #include <spu_intrinsics.h>
31 #include <spu_mfcio.h>
39 #define deprintf(fmt, args... ) \
40 fprintf( stdout, fmt, ##args ); \
43 #define deprintf( fmt, args... )
46 void cpy_to_fb(unsigned int);
48 /* fb_writer_spu parms */
49 static volatile struct fb_writer_parms_t parms __attribute__ ((aligned(128)));
51 /* Code running on SPU */
52 int main(unsigned long long spe_id __attribute__ ((unused)), unsigned long long argp __attribute__ ((unused)))
54 deprintf("[SPU] fb_writer_spu is up... (on SPE #%llu)\n", spe_id);
55 uint32_t ea_mfc, mbox;
57 spu_write_out_mbox(SPU_READY);
61 mbox = spu_read_in_mbox();
62 deprintf("[SPU] Message is %u\n", mbox);
65 deprintf("[SPU] fb_writer goes down...\n");
70 deprintf("[SPU] Cannot handle message\n");
74 /* Tag Manager setup */
76 tags = mfc_multi_tag_reserve(5);
77 if (tags == MFC_TAG_INVALID) {
78 deprintf("[SPU] Failed to reserve mfc tags on fb_writer\n");
82 /* Framebuffer parms */
83 ea_mfc = spu_read_in_mbox();
84 deprintf("[SPU] Message on fb_writer is %u\n", ea_mfc);
85 spu_mfcdma32(&parms, (unsigned int)ea_mfc,
86 sizeof(struct fb_writer_parms_t), tags,
88 deprintf("[SPU] argp = %u\n", (unsigned int)argp);
91 /* Copy parms->data to framebuffer */
92 deprintf("[SPU] Copying to framebuffer started\n");
94 deprintf("[SPU] Copying to framebuffer done!\n");
96 mfc_multi_tag_release(tags, 5);
97 deprintf("[SPU] fb_writer_spu... done!\n");
99 spu_write_out_mbox(SPU_FIN);
105 void cpy_to_fb(unsigned int tag_id_base)
108 unsigned char current_buf;
109 uint8_t *in = parms.data;
111 /* Align fb pointer which was centered before */
113 (unsigned char *)((unsigned int)parms.center & 0xFFFFFFF0);
115 uint32_t bounded_input_height = parms.bounded_input_height;
116 uint32_t bounded_input_width = parms.bounded_input_width;
117 uint32_t fb_pixel_size = parms.fb_pixel_size;
119 uint32_t out_line_stride = parms.out_line_stride;
120 uint32_t in_line_stride = parms.in_line_stride;
121 uint32_t in_line_size = bounded_input_width * fb_pixel_size;
125 /* Local store buffer */
126 static volatile uint8_t buf[4][BUFFER_SIZE]
127 __attribute__ ((aligned(128)));
128 /* do 4-times multibuffering using DMA list, process in two steps */
129 for (i = 0; i < bounded_input_height >> 2; i++) {
131 DMA_WAIT_TAG(tag_id_base + 1);
133 spu_mfcdma32(buf[0], (unsigned int)in, in_line_size,
134 tag_id_base + 1, MFC_GETB_CMD);
135 DMA_WAIT_TAG(tag_id_base + 1);
137 spu_mfcdma32(buf[0], (unsigned int)fb, in_line_size,
138 tag_id_base + 1, MFC_PUTB_CMD);
139 in += in_line_stride;
140 fb += out_line_stride;
141 deprintf("[SPU] 1st buffer copied in=0x%x, fb=0x%x\n", in,
145 DMA_WAIT_TAG(tag_id_base + 2);
147 spu_mfcdma32(buf[1], (unsigned int)in, in_line_size,
148 tag_id_base + 2, MFC_GETB_CMD);
149 DMA_WAIT_TAG(tag_id_base + 2);
151 spu_mfcdma32(buf[1], (unsigned int)fb, in_line_size,
152 tag_id_base + 2, MFC_PUTB_CMD);
153 in += in_line_stride;
154 fb += out_line_stride;
155 deprintf("[SPU] 2nd buffer copied in=0x%x, fb=0x%x\n", in,
159 DMA_WAIT_TAG(tag_id_base + 3);
161 spu_mfcdma32(buf[2], (unsigned int)in, in_line_size,
162 tag_id_base + 3, MFC_GETB_CMD);
163 DMA_WAIT_TAG(tag_id_base + 3);
165 spu_mfcdma32(buf[2], (unsigned int)fb, in_line_size,
166 tag_id_base + 3, MFC_PUTB_CMD);
167 in += in_line_stride;
168 fb += out_line_stride;
169 deprintf("[SPU] 3rd buffer copied in=0x%x, fb=0x%x\n", in,
173 DMA_WAIT_TAG(tag_id_base + 4);
175 spu_mfcdma32(buf[3], (unsigned int)in, in_line_size,
176 tag_id_base + 4, MFC_GETB_CMD);
177 DMA_WAIT_TAG(tag_id_base + 4);
179 spu_mfcdma32(buf[3], (unsigned int)fb, in_line_size,
180 tag_id_base + 4, MFC_PUTB_CMD);
181 in += in_line_stride;
182 fb += out_line_stride;
183 deprintf("[SPU] 4th buffer copied in=0x%x, fb=0x%x\n", in,
185 deprintf("[SPU] Loop #%i, bounded_input_height=%i\n", i,
186 bounded_input_height >> 2);
188 DMA_WAIT_TAG(tag_id_base + 2);
189 DMA_WAIT_TAG(tag_id_base + 3);
190 DMA_WAIT_TAG(tag_id_base + 4);