-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2007 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
+// Memory I/O handlers for Sega/Mega CD.\r
+// Loosely based on Gens code.\r
+// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
\r
// A68K no longer supported here\r
\r
//#define __debug_io\r
//#define __debug_io2\r
\r
-//#define rdprintf dprintf\r
-#define rdprintf(...)\r
+#define rdprintf dprintf\r
+//#define rdprintf(...)\r
//#define wrdprintf dprintf\r
#define wrdprintf(...)\r
+#define plprintf dprintf\r
+//#define plprintf(...)\r
\r
// -----------------------------------------------------------------\r
\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-void PicoMemResetCD(int r3)\r
-{\r
-}\r
-#endif\r
+// poller detection\r
+//#undef USE_POLL_DETECT\r
+#define POLL_LIMIT 16\r
+#define POLL_CYCLES 124\r
+// int m68k_poll_addr, m68k_poll_cnt;\r
+unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
- dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
+ // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
+ if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
+ //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
goto end;\r
case 4:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
Pico_mcd->m.busreq = d;\r
return;\r
case 2:\r
+ dprintf("m68k: prg wp=%02x", d);\r
Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
return;\r
case 3: {\r
u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
- dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
d &= 0xc2;\r
if ((dold>>6) != ((d>>6)&3))\r
dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
} else {\r
//dold &= ~2; // ??\r
+#if 1\r
+ if ((d & 2) && !(dold & 2)) {\r
+ Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
+ d &= ~2;\r
+ }\r
+#else\r
if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
+#endif\r
}\r
Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
-\r
-/*\r
- d |= Pico_mcd->s68k_regs[3]&0x1d;\r
- if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
- Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
-*/\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
}\r
case 6:\r
Pico_mcd->bios[0x72] = d;\r
dprintf("hint vector set to %08x", PicoRead32(0x70));\r
return;\r
+ case 0xf:\r
+ d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
case 0xe:\r
//dprintf("m68k: comm flag: %02x", d);\r
Pico_mcd->s68k_regs[0xe] = d;\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
}\r
\r
if ((a&0xf0) == 0x10) {\r
Pico_mcd->s68k_regs[a] = d;\r
+#ifdef USE_POLL_DETECT\r
+ if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
}\r
\r
dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
+#ifndef _ASM_CD_MEMORY_C\r
+static\r
+#endif\r
+u32 s68k_poll_detect(u32 a, u32 d)\r
+{\r
+#ifdef USE_POLL_DETECT\r
+ // polling detection\r
+ if (a == (s68k_poll_adclk&0xff)) {\r
+ unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
+ if (clkdiff <= POLL_CYCLES) {\r
+ s68k_poll_cnt++;\r
+ //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
+ if (s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(1);\r
+ plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);\r
+ }\r
+ s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
+ return d;\r
+ }\r
+ }\r
+ s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
+ s68k_poll_cnt = 0;\r
+#endif\r
+ return d;\r
+}\r
\r
#define READ_FONT_DATA(basemask) \\r
{ \\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
- goto end;\r
+ return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
case 2:\r
- d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
- dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
- goto end;\r
+ d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
+ //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
+ return s68k_poll_detect(a, d);\r
case 6:\r
- d = CDC_Read_Reg();\r
- goto end;\r
+ return CDC_Read_Reg();\r
case 8:\r
- d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
- goto end;\r
+ return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
case 0xC:\r
d = Pico_mcd->m.timer_stopwatch >> 16;\r
dprintf("s68k stopwatch timer read (%04x)", d);\r
- goto end;\r
+ return d;\r
case 0x30:\r
- dprintf("s68k int3 timer read (%02x%02x)", Pico_mcd->s68k_regs[30], Pico_mcd->s68k_regs[31]);\r
- break;\r
+ dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
+ return Pico_mcd->s68k_regs[31];\r
case 0x34: // fader\r
- d = 0; // no busy bit\r
- goto end;\r
+ return 0; // no busy bit\r
case 0x50: // font data (check: Lunar 2, Silpheed)\r
READ_FONT_DATA(0x00100000);\r
- goto end;\r
+ return d;\r
case 0x52:\r
READ_FONT_DATA(0x00010000);\r
- goto end;\r
+ return d;\r
case 0x54:\r
READ_FONT_DATA(0x10000000);\r
- goto end;\r
+ return d;\r
case 0x56:\r
READ_FONT_DATA(0x01000000);\r
- goto end;\r
+ return d;\r
}\r
\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
\r
-end:\r
-\r
- // dprintf("ret = %04x", d);\r
+ if (a >= 0x0e && a < 0x30)\r
+ return s68k_poll_detect(a, d);\r
\r
return d;\r
}\r
//dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
// TODO: review against Gens\r
+ // Warning: d might have upper bits set\r
switch (a) {\r
case 2:\r
return; // only m68k can change WP\r
case 3: {\r
int dold = Pico_mcd->s68k_regs[3];\r
- dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
d &= 0x1d;\r
d |= dold&0xc2;\r
if (d&4) {\r
PicoMemResetCD(d);\r
#endif\r
}\r
+#ifdef _ASM_CD_MEMORY_C\r
+ if ((d ^ dold) & 0x1d)\r
+ PicoMemResetCDdecode(d);\r
+#endif\r
if (!(dold & 4)) {\r
dprintf("wram mode 2M->1M");\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
Pico_mcd->m.timer_stopwatch = 0;\r
return;\r
case 0xe:\r
- Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
- Pico_mcd->m.timer_stopwatch = 0;\r
+ Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
return;\r
case 0x31:\r
dprintf("s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = d << 16;\r
+ Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
break;\r
case 0x33: // IRQ mask\r
dprintf("s68k irq mask: %02x", d);\r
{\r
if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
- dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
\r
#include "cell_map.c"\r
#endif // !def _ASM_CD_MEMORY_C\r
\r
+\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
\r
if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
d = *(prg_bank+((a^1)&0x1ffff));\r
goto end;\r
if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
d = *(u16 *)(prg_bank+(a&0x1fffe));\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
d = (pm[0]<<16)|pm[1];\r
\r
\r
// -----------------------------------------------------------------\r
-// Write Ram\r
\r
#ifdef _ASM_CD_MEMORY_C\r
void PicoWriteM68k8(u32 a,u8 d);\r
a&=0xffffff;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
*(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
return;\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
+ m68k_reg_write8(a, d);\r
+ return;\r
+ }\r
\r
OtherWrite8(a,d,8);\r
}\r
a&=0xfffffe;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
*(u16 *)(prg_bank+(a&0x1fffe))=d;\r
return;\r
}\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ // regs\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
+ if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
+ Pico_mcd->s68k_regs[0xe] = d >> 8;\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
+ return;\r
+ }\r
+ m68k_reg_write8(a, d>>8);\r
+ m68k_reg_write8(a+1,d&0xff);\r
+ return;\r
+ }\r
\r
OtherWrite16(a,d);\r
}\r
a&=0xfffffe;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
+ if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
+ }\r
\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
#endif\r
\r
\r
+// -----------------------------------------------------------------\r
+// S68k\r
// -----------------------------------------------------------------\r
\r
#ifdef _ASM_CD_MEMORY_C\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1ff;\r
rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68)\r
+ if (a >= 0x0e && a < 0x30) {\r
+ d = Pico_mcd->s68k_regs[a];\r
+ s68k_poll_detect(a, d);\r
+ rdprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+ else if (a >= 0x58 && a < 0x68)\r
d = gfx_cd_read(a&~1);\r
else d = s68k_reg_read16(a&~1);\r
if ((a&1)==0) d>>=8;\r
\r
// prg RAM\r
if (a < 0x80000) {\r
+ wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
d = *(u16 *)(Pico_mcd->prg_ram+a);\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
d |= d << 4; d &= 0x0f0f0f0f;\r
- dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
\r
// PCM\r
if ((a&0xff8000)==0xff0000) {\r
- dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
+ dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
a &= 0x7fff;\r
if (a >= 0x2000) {\r
a >>= 1;\r
#endif\r
\r
\r
+#ifndef _ASM_CD_MEMORY_C\r
/* check: jaguar xj 220 (draws entire world using decode) */\r
static void decode_write8(u32 a, u8 d, int r3)\r
{\r
d &= 0x0f;\r
if (!(a&1)) d <<= 4;\r
\r
- //dprintf("FIXME: decode, r3 = %02x", r3);\r
-\r
if (r3 == 8) {\r
if ((!(*pd & (~oldmask))) && d) goto do_it;\r
} else if (r3 > 8) {\r
} else {\r
*pd = d;\r
}\r
-\r
- //dprintf("FIXME: decode");\r
}\r
-\r
+#endif\r
\r
// -----------------------------------------------------------------\r
\r
// prg RAM\r
if (a < 0x80000) {\r
u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
- *pm=d;\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
return;\r
}\r
\r
a &= 0x1ff;\r
rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write(a&~1, (d<<8)|d);\r
+ gfx_cd_write16(a&~1, (d<<8)|d);\r
else s68k_reg_write8(a,d);\r
return;\r
}\r
\r
// prg RAM\r
if (a < 0x80000) {\r
- *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
+ wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
+ *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
return;\r
}\r
\r
a &= 0x1fe;\r
rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write(a, d);\r
+ gfx_cd_write16(a, d);\r
else {\r
if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
Pico_mcd->s68k_regs[0xf] = d;\r
\r
// prg RAM\r
if (a < 0x80000) {\r
- u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
+ u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
return;\r
}\r
\r
a &= 0x1fe;\r
rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68) {\r
- gfx_cd_write(a, d>>16);\r
- gfx_cd_write(a+2, d&0xffff);\r
+ gfx_cd_write16(a, d>>16);\r
+ gfx_cd_write16(a+2, d&0xffff);\r
} else {\r
+ if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
s68k_reg_write8(a, d>>24);\r
s68k_reg_write8(a+1,(d>>16)&0xff);\r
s68k_reg_write8(a+2,(d>>8) &0xff);\r
PicoCpuS68k.write16=PicoWriteS68k16;\r
PicoCpuS68k.write32=PicoWriteS68k32;\r
#endif\r
+ // m68k_poll_addr = m68k_poll_cnt = 0;\r
+ s68k_poll_adclk = s68k_poll_cnt = 0;\r
}\r
\r
\r