-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2007 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
+// Memory I/O handlers for Sega/Mega CD.\r
+// Loosely based on Gens code.\r
+// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
\r
// A68K no longer supported here\r
\r
\r
#include "../PicoInt.h"\r
\r
-#include "../sound/sound.h"\r
#include "../sound/ym2612.h"\r
#include "../sound/sn76496.h"\r
\r
#include "gfx_cd.h"\r
#include "pcm.h"\r
\r
-#include "cell_map.c"\r
-\r
+#ifndef UTYPES_DEFINED\r
typedef unsigned char u8;\r
typedef unsigned short u16;\r
typedef unsigned int u32;\r
+#define UTYPES_DEFINED\r
+#endif\r
\r
//#define __debug_io\r
//#define __debug_io2\r
-//#define rdprintf dprintf\r
-#define rdprintf(...)\r
+\r
+#define rdprintf dprintf\r
+//#define rdprintf(...)\r
+//#define wrdprintf dprintf\r
+#define wrdprintf(...)\r
+#define plprintf dprintf\r
+//#define plprintf(...)\r
\r
// -----------------------------------------------------------------\r
\r
+// poller detection\r
+//#undef USE_POLL_DETECT\r
+#define POLL_LIMIT 16\r
+#define POLL_CYCLES 124\r
+// int m68k_poll_addr, m68k_poll_cnt;\r
+unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
\r
+#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
- dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
+ // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
+ if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
+ //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
goto end;\r
case 4:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
goto end;\r
case 6:\r
- d = Pico_mcd->m.hint_vector;\r
+ d = *(u16 *)(Pico_mcd->bios + 0x72);\r
goto end;\r
case 8:\r
d = Read_CDC_Host(0);\r
dprintf("m68k FIXME: reserved read");\r
goto end;\r
case 0xC:\r
- dprintf("m68k stopwatch timer read");\r
d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ dprintf("m68k stopwatch timer read (%04x)", d);\r
goto end;\r
}\r
\r
// dprintf("ret = %04x", d);\r
return d;\r
}\r
+#endif\r
\r
-static void m68k_reg_write8(u32 a, u32 d)\r
+#ifndef _ASM_CD_MEMORY_C\r
+static\r
+#endif\r
+void m68k_reg_write8(u32 a, u32 d)\r
{\r
a &= 0x3f;\r
// dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- Pico_mcd->m.state_flags&=~1;\r
- dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
+ Pico_mcd->m.state_flags&=~1;\r
+ dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
}\r
Pico_mcd->m.busreq = d;\r
return;\r
case 2:\r
+ dprintf("m68k: prg wp=%02x", d);\r
Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
return;\r
- case 3:\r
- dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ case 3: {\r
+ u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
+ //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
d &= 0xc2;\r
- if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
+ if ((dold>>6) != ((d>>6)&3))\r
dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
//if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
//if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
// ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
- d |= Pico_mcd->s68k_regs[3]&0x1d;\r
- if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
- Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
+ if (dold & 4) {\r
+ d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
+ } else {\r
+ //dold &= ~2; // ??\r
+#if 1\r
+ if ((d & 2) && !(dold & 2)) {\r
+ Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
+ d &= ~2;\r
+ }\r
+#else\r
+ if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
+#endif\r
+ }\r
+ Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
+ }\r
case 6:\r
- dprintf("FIXME hint[2]: %02x @%06x", (u8)d, SekPc);\r
Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
return;\r
case 7:\r
- dprintf("FIXME hint[3]: %02x @%06x", (u8)d, SekPc);\r
Pico_mcd->bios[0x72] = d;\r
- dprintf("vector is now %08x", PicoRead32(0x70));\r
+ dprintf("hint vector set to %08x", PicoRead32(0x70));\r
return;\r
+ case 0xf:\r
+ d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
case 0xe:\r
//dprintf("m68k: comm flag: %02x", d);\r
Pico_mcd->s68k_regs[0xe] = d;\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
}\r
\r
if ((a&0xf0) == 0x10) {\r
Pico_mcd->s68k_regs[a] = d;\r
+#ifdef USE_POLL_DETECT\r
+ if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
return;\r
}\r
\r
dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
+#ifndef _ASM_CD_MEMORY_C\r
+static\r
+#endif\r
+u32 s68k_poll_detect(u32 a, u32 d)\r
+{\r
+#ifdef USE_POLL_DETECT\r
+ // polling detection\r
+ if (a == (s68k_poll_adclk&0xff)) {\r
+ unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
+ if (clkdiff <= POLL_CYCLES) {\r
+ s68k_poll_cnt++;\r
+ //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
+ if (s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(1);\r
+ plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);\r
+ }\r
+ s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
+ return d;\r
+ }\r
+ }\r
+ s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
+ s68k_poll_cnt = 0;\r
+#endif\r
+ return d;\r
+}\r
+\r
+#define READ_FONT_DATA(basemask) \\r
+{ \\r
+ unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
+ unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
+ if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
+ if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
+ if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
+ if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
+}\r
\r
\r
-static u32 s68k_reg_read16(u32 a)\r
+#ifndef _ASM_CD_MEMORY_C\r
+static\r
+#endif\r
+u32 s68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
- goto end;\r
+ return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
case 2:\r
- d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
- dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
- goto end;\r
+ d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
+ //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
+ return s68k_poll_detect(a, d);\r
case 6:\r
- d = CDC_Read_Reg();\r
- goto end;\r
+ return CDC_Read_Reg();\r
case 8:\r
- d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
- goto end;\r
+ return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
case 0xC:\r
- dprintf("s68k stopwatch timer read");\r
d = Pico_mcd->m.timer_stopwatch >> 16;\r
- goto end;\r
+ dprintf("s68k stopwatch timer read (%04x)", d);\r
+ return d;\r
case 0x30:\r
- dprintf("s68k int3 timer read");\r
- break;\r
+ dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
+ return Pico_mcd->s68k_regs[31];\r
case 0x34: // fader\r
- d = 0; // no busy bit\r
- goto end;\r
+ return 0; // no busy bit\r
+ case 0x50: // font data (check: Lunar 2, Silpheed)\r
+ READ_FONT_DATA(0x00100000);\r
+ return d;\r
+ case 0x52:\r
+ READ_FONT_DATA(0x00010000);\r
+ return d;\r
+ case 0x54:\r
+ READ_FONT_DATA(0x10000000);\r
+ return d;\r
+ case 0x56:\r
+ READ_FONT_DATA(0x01000000);\r
+ return d;\r
}\r
\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
\r
-end:\r
-\r
- // dprintf("ret = %04x", d);\r
+ if (a >= 0x0e && a < 0x30)\r
+ return s68k_poll_detect(a, d);\r
\r
return d;\r
}\r
\r
-static void s68k_reg_write8(u32 a, u32 d)\r
+#ifndef _ASM_CD_MEMORY_C\r
+static\r
+#endif\r
+void s68k_reg_write8(u32 a, u32 d)\r
{\r
//dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
// TODO: review against Gens\r
+ // Warning: d might have upper bits set\r
switch (a) {\r
case 2:\r
return; // only m68k can change WP\r
case 3: {\r
int dold = Pico_mcd->s68k_regs[3];\r
- dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
d &= 0x1d;\r
+ d |= dold&0xc2;\r
if (d&4) {\r
- d |= dold&0xc2;\r
- if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+ if ((d ^ dold) & 5) {\r
+ d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+#ifdef _ASM_CD_MEMORY_C\r
+ PicoMemResetCD(d);\r
+#endif\r
+ }\r
+#ifdef _ASM_CD_MEMORY_C\r
+ if ((d ^ dold) & 0x1d)\r
+ PicoMemResetCDdecode(d);\r
+#endif\r
if (!(dold & 4)) {\r
dprintf("wram mode 2M->1M");\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
- }\r
+ }\r
} else {\r
- d |= Pico_mcd->s68k_regs[3]&0xc3;\r
- if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
if (dold & 4) {\r
dprintf("wram mode 1M->2M");\r
+ if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
+ d &= ~3;\r
+ d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
+ }\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- }\r
+#ifdef _ASM_CD_MEMORY_C\r
+ PicoMemResetCD(d);\r
+#endif\r
+ }\r
+ else\r
+ d |= dold&1;\r
+ if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
}\r
break;\r
}\r
Pico_mcd->m.timer_stopwatch = 0;\r
return;\r
case 0xe:\r
- Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
- Pico_mcd->m.timer_stopwatch = 0;\r
+ Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
return;\r
case 0x31:\r
dprintf("s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = d << 16;\r
+ Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
break;\r
case 0x33: // IRQ mask\r
dprintf("s68k irq mask: %02x", d);\r
}\r
\r
\r
-\r
+#ifndef _ASM_CD_MEMORY_C\r
static u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
{\r
if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
- dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
\r
#undef _ASM_MEMORY_C\r
#include "../MemoryCmn.c"\r
+#include "cell_map.c"\r
+#endif // !def _ASM_CD_MEMORY_C\r
\r
\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
\r
-u8 PicoReadM68k8(u32 a)\r
+//u8 PicoReadM68k8_(u32 a);\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadM68k8(u32 a);\r
+#else\r
+static u32 PicoReadM68k8(u32 a)\r
{\r
u32 d=0;\r
\r
if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
d = *(prg_bank+((a^1)&0x1ffff));\r
goto end;\r
}\r
\r
-#if 0\r
- if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
- {\r
- int i;\r
- FILE *ff;\r
- unsigned short *ram = (unsigned short *) Pico.ram;\r
- // unswap and dump RAM\r
- for (i = 0; i < 0x10000/2; i++)\r
- ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
- ff = fopen("ram.bin", "wb");\r
- fwrite(ram, 1, 0x10000, ff);\r
- fclose(ff);\r
- exit(0);\r
- }\r
-#endif\r
-\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
- dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
+ wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000)\r
// allow access in any mode, like Gens does\r
d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
}\r
- dprintf("ret = %02x", (u8)d);\r
+ wrdprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
#ifdef __debug_io\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#endif\r
- return (u8)d;\r
+ return d;\r
}\r
+#endif\r
\r
\r
-u16 PicoReadM68k16(u32 a)\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadM68k16(u32 a);\r
+#else\r
+static u32 PicoReadM68k16(u32 a)\r
{\r
- u16 d=0;\r
+ u32 d=0;\r
\r
if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
\r
if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
d = *(u16 *)(prg_bank+(a&0x1fffe));\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
- dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
+ wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000)\r
// allow access in any mode, like Gens does\r
d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
}\r
- dprintf("ret = %04x", d);\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
if ((a&0xffffc0)==0xa12000)\r
rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- d = (u16)OtherRead16(a, 16);\r
+ d = OtherRead16(a, 16);\r
\r
if ((a&0xffffc0)==0xa12000)\r
rdprintf("ret = %04x", d);\r
#endif\r
return d;\r
}\r
+#endif\r
\r
\r
-u32 PicoReadM68k32(u32 a)\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadM68k32(u32 a);\r
+#else\r
+static u32 PicoReadM68k32(u32 a)\r
{\r
u32 d=0;\r
\r
if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
d = (pm[0]<<16)|pm[1];\r
\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
- dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
+ wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000) { // cell arranged\r
u32 a1, a2;\r
a1 = (a&2) | (cell_map(a >> 2) << 2);\r
- if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
- else a2 = a1 + 2;\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
- d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
+ d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
} else {\r
u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
// allow access in any mode, like Gens does\r
u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
- dprintf("ret = %08x", d);\r
+ wrdprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
#endif\r
return d;\r
}\r
+#endif\r
\r
\r
// -----------------------------------------------------------------\r
-// Write Ram\r
\r
-void PicoWriteM68k8(u32 a,u8 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteM68k8(u32 a,u8 d);\r
+#else\r
+static void PicoWriteM68k8(u32 a,u8 d)\r
{\r
#ifdef __debug_io\r
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
a&=0xffffff;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
*(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
return;\r
\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
- dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
+ wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000)\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
+ m68k_reg_write8(a, d);\r
+ return;\r
+ }\r
\r
- OtherWrite8(a,d,8);\r
+ OtherWrite8(a,d);\r
}\r
+#endif\r
\r
\r
-void PicoWriteM68k16(u32 a,u16 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteM68k16(u32 a,u16 d);\r
+#else\r
+static void PicoWriteM68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
a&=0xfffffe;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
*(u16 *)(prg_bank+(a&0x1fffe))=d;\r
return;\r
}\r
\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
- dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000)\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ // regs\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
+ if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
+ Pico_mcd->s68k_regs[0xe] = d >> 8;\r
+#ifdef USE_POLL_DETECT\r
+ if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0); s68k_poll_adclk = 0;\r
+ plprintf("s68k poll release, a=%02x\n", a);\r
+ }\r
+#endif\r
+ return;\r
+ }\r
+ m68k_reg_write8(a, d>>8);\r
+ m68k_reg_write8(a+1,d&0xff);\r
+ return;\r
+ }\r
\r
OtherWrite16(a,d);\r
}\r
+#endif\r
\r
\r
-void PicoWriteM68k32(u32 a,u32 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteM68k32(u32 a,u32 d);\r
+#else\r
+static void PicoWriteM68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io\r
dprintf("w32: %06x, %08x", a&0xffffff, d);\r
a&=0xfffffe;\r
\r
// prg RAM\r
- if ((a&0xfe0000)==0x020000) {\r
+ if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
if (d != 0) // don't log clears\r
- dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
int bank = Pico_mcd->s68k_regs[3]&1;\r
if (a >= 0x220000) { // cell arranged\r
u32 a1, a2;\r
a1 = (a&2) | (cell_map(a >> 2) << 2);\r
- if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
- else a2 = a1 + 2;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
} else {\r
u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
return;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
+ if ((a&0xffffc0)==0xa12000) {\r
rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
+ if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
+ }\r
\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
}\r
+#endif\r
\r
\r
+// -----------------------------------------------------------------\r
+// S68k\r
// -----------------------------------------------------------------\r
\r
-\r
-u8 PicoReadS68k8(u32 a)\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadS68k8(u32 a);\r
+#else\r
+static u32 PicoReadS68k8(u32 a)\r
{\r
u32 d=0;\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1ff;\r
rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68)\r
+ if (a >= 0x0e && a < 0x30) {\r
+ d = Pico_mcd->s68k_regs[a];\r
+ s68k_poll_detect(a, d);\r
+ rdprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+ else if (a >= 0x58 && a < 0x68)\r
d = gfx_cd_read(a&~1);\r
else d = s68k_reg_read16(a&~1);\r
if ((a&1)==0) d>>=8;\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
// test: batman returns\r
- dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
+ wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
int bank = !(Pico_mcd->s68k_regs[3]&1);\r
d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
// allow access in any mode, like Gens does\r
d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
}\r
- dprintf("ret = %02x", (u8)d);\r
+ wrdprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
int bank;\r
- dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
- dprintf("ret = %02x", (u8)d);\r
+ wrdprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
#ifdef __debug_io2\r
dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
#endif\r
- return (u8)d;\r
+ return d;\r
}\r
+#endif\r
\r
\r
-u16 PicoReadS68k16(u32 a)\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadS68k16(u32 a);\r
+#else\r
+static u32 PicoReadS68k16(u32 a)\r
{\r
u32 d=0;\r
\r
\r
// prg RAM\r
if (a < 0x80000) {\r
+ wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
d = *(u16 *)(Pico_mcd->prg_ram+a);\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1fe;\r
rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68)\r
+ if (a >= 0x58 && a < 0x68)\r
d = gfx_cd_read(a);\r
else d = s68k_reg_read16(a);\r
rdprintf("ret = %04x", d);\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
+ wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
int bank = !(Pico_mcd->s68k_regs[3]&1);\r
d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
// allow access in any mode, like Gens does\r
d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
}\r
- dprintf("ret = %04x", d);\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
int bank;\r
- dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- dprintf("ret = %04x", d);\r
+ wrdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
// bram\r
if ((a&0xff0000)==0xfe0000) {\r
- dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
+ dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
a = (a>>1)&0x1fff;\r
d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
- d|= Pico_mcd->bram[a++] << 8;\r
+ d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
dprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
// PCM\r
if ((a&0xff8000)==0xff0000) {\r
- dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
+ dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
a &= 0x7fff;\r
if (a >= 0x2000)\r
d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
#endif\r
return d;\r
}\r
+#endif\r
\r
\r
-u32 PicoReadS68k32(u32 a)\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadS68k32(u32 a);\r
+#else\r
+static u32 PicoReadS68k32(u32 a)\r
{\r
u32 d=0;\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1fe;\r
rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68)\r
+ if (a >= 0x58 && a < 0x68)\r
d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
rdprintf("ret = %08x", d);\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
+ wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
int bank = !(Pico_mcd->s68k_regs[3]&1);\r
a >>= 1;\r
d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
d |= d << 4; d &= 0x0f0f0f0f;\r
- dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
- dprintf("ret = %08x", d);\r
+ wrdprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
int bank;\r
- dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
- dprintf("ret = %08x", d);\r
+ wrdprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
\r
// bram\r
if ((a&0xff0000)==0xfe0000) {\r
- dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
+ dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
a = (a>>1)&0x1fff;\r
d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
d|= Pico_mcd->bram[a++] << 24;\r
#endif\r
return d;\r
}\r
+#endif\r
+\r
+\r
+#ifndef _ASM_CD_MEMORY_C\r
+/* check: jaguar xj 220 (draws entire world using decode) */\r
+static void decode_write8(u32 a, u8 d, int r3)\r
+{\r
+ u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
+ u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
+\r
+ r3 &= 0x18;\r
+ d &= 0x0f;\r
+ if (!(a&1)) d <<= 4;\r
+\r
+ if (r3 == 8) {\r
+ if ((!(*pd & (~oldmask))) && d) goto do_it;\r
+ } else if (r3 > 8) {\r
+ if (d) goto do_it;\r
+ } else {\r
+ goto do_it;\r
+ }\r
+\r
+ return;\r
+do_it:\r
+ *pd = d | (*pd & oldmask);\r
+}\r
+\r
\r
+static void decode_write16(u32 a, u16 d, int r3)\r
+{\r
+ u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
+\r
+ //if ((a & 0x3ffff) < 0x28000) return;\r
+\r
+ r3 &= 0x18;\r
+ d &= 0x0f0f;\r
+ d |= d >> 4;\r
+\r
+ if (r3 == 8) {\r
+ u8 dold = *pd;\r
+ if (!(dold & 0xf0)) dold |= d & 0xf0;\r
+ if (!(dold & 0x0f)) dold |= d & 0x0f;\r
+ *pd = dold;\r
+ } else if (r3 > 8) {\r
+ u8 dold = *pd;\r
+ if (!(d & 0xf0)) d |= dold & 0xf0;\r
+ if (!(d & 0x0f)) d |= dold & 0x0f;\r
+ *pd = d;\r
+ } else {\r
+ *pd = d;\r
+ }\r
+}\r
+#endif\r
\r
// -----------------------------------------------------------------\r
\r
-void PicoWriteS68k8(u32 a,u8 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteS68k8(u32 a,u8 d);\r
+#else\r
+static void PicoWriteS68k8(u32 a,u8 d)\r
{\r
#ifdef __debug_io2\r
dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
// prg RAM\r
if (a < 0x80000) {\r
u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
- *pm=d;\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
return;\r
}\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1ff;\r
rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68)\r
- gfx_cd_write(a&~1, (d<<8)|d);\r
+ if (a >= 0x58 && a < 0x68)\r
+ gfx_cd_write16(a&~1, (d<<8)|d);\r
else s68k_reg_write8(a,d);\r
return;\r
}\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = !(Pico_mcd->s68k_regs[3]&1);\r
- if (a&1) d &= 0x0f;\r
- else d >>= 4;\r
- Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d;\r
- dprintf("FIXME: decode");\r
+ int r3 = Pico_mcd->s68k_regs[3];\r
+ wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
+ if (r3 & 4) { // 1M decode mode?\r
+ decode_write8(a, d, r3);\r
} else {\r
// allow access in any mode, like Gens does\r
*(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ // Wing Commander tries to write here in wrong mode\r
int bank;\r
if (d)\r
- dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
*(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
return;\r
\r
dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
+#endif\r
\r
\r
-void PicoWriteS68k16(u32 a,u16 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteS68k16(u32 a,u16 d);\r
+#else\r
+static void PicoWriteS68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io2\r
dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
// prg RAM\r
if (a < 0x80000) {\r
- *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
+ wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
+ *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
return;\r
}\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1fe;\r
rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68)\r
- gfx_cd_write(a, d);\r
+ if (a >= 0x58 && a < 0x68)\r
+ gfx_cd_write16(a, d);\r
else {\r
if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
Pico_mcd->s68k_regs[0xf] = d;\r
- return;\r
+ return;\r
}\r
s68k_reg_write8(a, d>>8);\r
s68k_reg_write8(a+1,d&0xff);\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = !(Pico_mcd->s68k_regs[3]&1);\r
- d &= ~0xf0; d |= d >> 8;\r
- Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d;\r
- dprintf("FIXME: decode");\r
+ int r3 = Pico_mcd->s68k_regs[3];\r
+ wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ if (r3 & 4) { // 1M decode mode?\r
+ decode_write16(a, d, r3);\r
} else {\r
// allow access in any mode, like Gens does\r
*(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
int bank;\r
if (d)\r
- dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
*(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
return;\r
\r
dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
+#endif\r
\r
\r
-void PicoWriteS68k32(u32 a,u32 d)\r
+#ifdef _ASM_CD_MEMORY_C\r
+void PicoWriteS68k32(u32 a,u32 d);\r
+#else\r
+static void PicoWriteS68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io2\r
dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
// prg RAM\r
if (a < 0x80000) {\r
- u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
+ u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
return;\r
}\r
\r
if ((a&0xfffe00) == 0xff8000) {\r
a &= 0x1fe;\r
rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x50 && a < 0x68) {\r
- gfx_cd_write(a, d>>16);\r
- gfx_cd_write(a+2, d&0xffff);\r
+ if (a >= 0x58 && a < 0x68) {\r
+ gfx_cd_write16(a, d>>16);\r
+ gfx_cd_write16(a+2, d&0xffff);\r
} else {\r
+ if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
s68k_reg_write8(a, d>>24);\r
s68k_reg_write8(a+1,(d>>16)&0xff);\r
s68k_reg_write8(a+2,(d>>8) &0xff);\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = !(Pico_mcd->s68k_regs[3]&1);\r
- a >>= 1;\r
- d &= 0x0f0f0f0f; d |= d >> 4;\r
- Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16;\r
- Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d;\r
- dprintf("FIXME: decode");\r
+ int r3 = Pico_mcd->s68k_regs[3];\r
+ wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
+ if (r3 & 4) { // 1M decode mode?\r
+ decode_write16(a , d >> 16, r3);\r
+ decode_write16(a+2, d , r3);\r
} else {\r
// allow access in any mode, like Gens does\r
u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
int bank;\r
u16 *pm;\r
if (d)\r
- dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- dprintf("s68k_wram1M FIXME: wrong mode");\r
+ wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
+// if (!(Pico_mcd->s68k_regs[3]&4))\r
+// dprintf("s68k_wram1M FIXME: wrong mode");\r
bank = !(Pico_mcd->s68k_regs[3]&1);\r
pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
\r
dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
-\r
+#endif\r
\r
\r
// -----------------------------------------------------------------\r
#endif\r
\r
\r
-void PicoMemSetupCD()\r
+PICO_INTERNAL void PicoMemSetupCD(void)\r
{\r
dprintf("PicoMemSetupCD()");\r
#ifdef EMU_C68K\r
PicoCpuS68k.write16=PicoWriteS68k16;\r
PicoCpuS68k.write32=PicoWriteS68k32;\r
#endif\r
+ // m68k_poll_addr = m68k_poll_cnt = 0;\r
+ s68k_poll_adclk = s68k_poll_cnt = 0;\r
}\r
\r
\r