{
int level_new = new_irq_level(level);
- dprintf("s68kACK %i -> %i", level, level_new);
+ elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
PicoCpuCS68k.irq = level_new;
return CYCLONE_INT_ACK_AUTOVECTOR;
}
static void SekResetAckS68k(void)
{
- dprintf("s68k: Reset encountered @ %06x", SekPcS68k);
+ elprintf(EL_ANOMALY, "s68k: Reset encountered @ %06x", SekPcS68k);
}
static int SekUnrecognizedOpcodeS68k(void)
unsigned int pc, op;
pc = SekPcS68k;
op = PicoCpuCS68k.read16(pc);
- dprintf("Unrecognized Opcode %04x @ %06x", op, pc);
+ elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);
//exit(1);
return 0;
}
#ifdef EMU_M68K
static int SekIntAckMS68k(int level)
{
+#ifndef EMU_CORE_DEBUG
int level_new = new_irq_level(level);
- dprintf("s68kACK %i -> %i", level, level_new);
+ elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
CPU_INT_LEVEL = level_new << 8;
+#else
+ CPU_INT_LEVEL = 0;
+#endif
return M68K_INT_ACK_AUTOVECTOR;
}
#endif
static void SekIntAckFS68k(unsigned level)
{
int level_new = new_irq_level(level);
- dprintf("s68kACK %i -> %i", level, level_new);
+ elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
+#ifndef EMU_CORE_DEBUG
PicoCpuFS68k.interrupts[0] = level_new;
+#else
+ {
+ extern int dbg_irq_level_sub;
+ dbg_irq_level_sub = level_new;
+ PicoCpuFS68k.interrupts[0] = 0;
+ }
+#endif
}
#endif
-PICO_INTERNAL int SekInitS68k()
+PICO_INTERNAL void SekInitS68k(void)
{
#ifdef EMU_C68K
// CycloneInit();
memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k));
fm68k_init();
PicoCpuFS68k.iack_handler = SekIntAckFS68k;
+ PicoCpuFS68k.sr = 0x2704; // Z flag
g_m68kcontext = oldcontext;
}
#endif
-
- return 0;
}
// Reset the 68000:
-PICO_INTERNAL int SekResetS68k()
+PICO_INTERNAL int SekResetS68k(void)
{
if (Pico.rom==NULL) return 1;
irqs = Pico_mcd->m.s68k_pend_ints >> 1;
while ((irqs >>= 1)) real_irq++;
+#ifdef EMU_CORE_DEBUG
+ {
+ extern int dbg_irq_level_sub;
+ dbg_irq_level_sub=real_irq;
+ return 0;
+ }
+#endif
#ifdef EMU_C68K
PicoCpuCS68k.irq=real_irq;
#endif