\r
/* Phase Generator */\r
UINT32 phase; /* #0x0c phase counter | need_save */\r
- UINT32 Incr; /* #0x10 phase step | need_save */\r
+ UINT32 Incr; /* #0x10 phase step */\r
\r
UINT8 KSR; /* #0x14 key scale rate :3-KSR */\r
UINT8 ksr; /* #0x15 key scale rate :kcode>>(3-KSR) */\r
{\r
FM_SLOT SLOT[4]; /* four SLOTs (operators) */\r
\r
- UINT8 ALGO; /* algorithm */\r
+ UINT8 ALGO; /* +00 algorithm */\r
UINT8 FB; /* feedback shift */\r
+ UINT8 pad[2];\r
INT32 op1_out; /* op1 output for feedback */\r
\r
- INT32 mem_value; /* delayed sample (MEM) value */\r
+ INT32 mem_value; /* +08 delayed sample (MEM) value */\r
\r
INT32 pms; /* channel PMS */\r
UINT8 ams; /* channel AMS */\r
\r
- UINT8 kcode; /* key code: */\r
+ UINT8 kcode; /* +11 key code: */\r
+ UINT8 fn_h; /* freq latch */\r
+ UINT8 pad2;\r
UINT32 fc; /* fnum,blk:adjusted to sample rate */\r
UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r
\r
/* LFO */\r
UINT8 AMmasks; /* AM enable flag */\r
-\r
+ UINT8 pad3[3];\r
} FM_CH;\r
\r
typedef struct\r
UINT8 address; /* 10 address register | need_save */\r
UINT8 status; /* 11 status flag | need_save */\r
UINT8 mode; /* mode CSM / 3SLOT */\r
- UINT8 fn_h; /* freq latch */\r
+ UINT8 pad;\r
int TA; /* timer a */\r
int TAC; /* timer a maxval */\r
int TAT; /* timer a ticker | need_save */\r
UINT8 TB; /* timer b */\r
- UINT8 pad[3];\r
+ UINT8 pad2[3];\r
int TBC; /* timer b maxval */\r
int TBT; /* timer b ticker | need_save */\r
/* local time tables */\r
FM_3SLOT SL3; /* 3 slot mode state */\r
UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r
\r
- UINT32 eg_cnt; /* #0xb38 global envelope generator counter | need_save */\r
- UINT32 eg_timer; /* #0xb3c global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r
- UINT32 eg_timer_add; /* #0xb40 step of eg_timer */\r
+ UINT32 eg_cnt; /* global envelope generator counter | need_save */\r
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r
+ UINT32 eg_timer_add; /* step of eg_timer */\r
\r
/* LFO */\r
UINT32 lfo_cnt; /* need_save */\r
UINT8 REGS[0x200]; /* registers (for save states) */\r
INT32 addr_A1; /* address line A1 | need_save */\r
\r
- FM_CH CH[6]; /* channel state (0x168 bytes each)? */\r
+ FM_CH CH[6]; /* channel state */\r
\r
/* dac output (YM2612) */\r
int dacen;\r