\r
#include "app.h"\r
\r
-static void CheckPc(int reg)\r
+// in/out address in r0, trashes all temp regs\r
+static void CheckPc(void)\r
{\r
#if USE_CHECKPC_CALLBACK\r
- ot(";@ Check Memory Base+pc (r4)\n");\r
- if (reg != 0)\r
- ot(" mov r0,r%i\n", reg);\r
+ ot(";@ Check Memory Base+pc\n");\r
ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
- ot(" mov r4,r0\n");\r
-#else\r
- ot(" bic r4,r%d,#1\n",reg); // we do not emulate address errors\r
-#endif\r
ot("\n");\r
+#endif\r
}\r
\r
// Push 32-bit value in r1 - trashes r0-r3,r12,lr\r
OpRegToFlags(high);\r
}\r
\r
-// Pop PC - assumes r10=Memory Base - trashes r0-r3\r
+// Pop PC - trashes r0-r3\r
static void PopPc()\r
{\r
ot(";@ Pop PC:\n");\r
ot(" add r1,r0,#4 ;@ Postincrement A7\n");\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(0,2);\r
- ot(" add r0,r0,r10 ;@ Memory Base+PC\n");\r
+ ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" add r0,r0,r1 ;@ Memory Base+PC\n");\r
ot("\n");\r
- CheckPc(0);\r
+ CheckPc();\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" mov r4,r0\n");\r
+#else\r
+ ot(" bic r4,r0,#1\n");\r
+#endif\r
}\r
\r
int OpTrap(int op)\r
\r
OpStart(op,0x10);\r
ot(" and r0,r8,#0xf ;@ Get trap number\n");\r
- ot(" orr r0,r0,#0x20\n");\r
- ot(" mov r0,r0,asl #2\n");\r
+ ot(" orr r0,r0,#0x20 ;@ 32+n\n");\r
ot(" bl Exception\n");\r
ot("\n");\r
\r
\r
if(reg!=7) {\r
ot(";@ Get An\n");\r
- EaCalc(10, 7, 8, 2, 1);\r
- EaRead(10, 1, 8, 2, 7, 1);\r
+ EaCalc(11, 7, 8, 2, 1);\r
+ EaRead(11, 1, 8, 2, 7, 1);\r
}\r
\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
ot(" sub r0,r0,#4 ;@ A7-=4\n");\r
- ot(" mov r11,r0\n");\r
+ ot(" mov r8,r0 ;@ abuse r8\n");\r
if(reg==7) ot(" mov r1,r0\n");\r
ot("\n");\r
\r
\r
ot(";@ Save to An\n");\r
if(reg!=7)\r
- EaWrite(10,11, 8, 2, 7, 1);\r
+ EaWrite(11,8, 8, 2, 7, 1);\r
\r
ot(";@ Get offset:\n");\r
- EaCalc(0,0,0x3c,1);\r
+ EaCalc(0,0,0x3c,1); // abused r8 is ok because of imm EA\r
EaRead(0,0,0x3c,1,0);\r
\r
- ot(" add r11,r11,r0 ;@ Add offset to A7\n");\r
- ot(" str r11,[r7,#0x3c]\n");\r
+ ot(" add r8,r8,r0 ;@ Add offset to A7\n");\r
+ ot(" str r8,[r7,#0x3c]\n");\r
ot("\n");\r
\r
Cycles=16;\r
OpStart(op,0x10);\r
\r
ot(";@ Get An\n");\r
- EaCalc(10, 0xf, 8, 2, 1);\r
- EaRead(10, 0, 8, 2, 0xf, 1);\r
+ EaCalc(11, 0xf, 8, 2, 1);\r
+ EaRead(11, 0, 8, 2, 0xf, 1);\r
\r
- ot(" add r11,r0,#4 ;@ A7+=4\n");\r
+ ot(" add r8,r0,#4 ;@ A7+=4, abuse r8\n");\r
ot("\n");\r
ot(";@ Pop An from stack:\n");\r
MemHandler(0,2);\r
ot("\n");\r
- ot(" str r11,[r7,#0x3c] ;@ Save A7\n");\r
+ ot(" str r8,[r7,#0x3c] ;@ Save A7\n");\r
ot("\n");\r
ot(";@ An = value from stack:\n");\r
- EaWrite(10, 0, 8, 2, 7, 1);\r
+ EaWrite(11, 0, 8, 2, 7, 1);\r
\r
Cycles=12;\r
OpEnd(0x10);\r
return 0;\r
\r
case 3: // rte\r
- OpStart(op,0x10); Cycles=20;\r
- SuperCheck(op);\r
+ OpStart(op,0x10,0,0,1); Cycles=20;\r
PopSr(1);\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
- SuperChange(op);\r
- CheckInterrupt(op);\r
- OpEnd(0x10);\r
+ ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");\r
+ SuperChange(op,1);\r
+#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO || EMULATE_HALT\r
+ ot(" ldr r1,[r7,#0x58]\n");\r
+ ot(" bic r1,r1,#0x0c ;@ clear 'not processing instruction' and 'doing addr error' bits\n");\r
+ ot(" str r1,[r7,#0x58]\n");\r
+#endif\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#endif\r
+ opend_check_interrupt = 1;\r
+ opend_check_trace = 1;\r
+ OpEnd(0x10,0);\r
return 0;\r
\r
case 5: // rts\r
OpStart(op,0x10); Cycles=16;\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#endif\r
OpEnd(0x10);\r
return 0;\r
\r
case 6: // trapv\r
- OpStart(op,0x10); Cycles=4;\r
- ot(" tst r9,#0x10000000\n");\r
+ OpStart(op,0x10,0,1); Cycles=4;\r
+ ot(" tst r10,#0x10000000\n");\r
ot(" subne r5,r5,#%i\n",34);\r
- ot(" movne r0,#0x1c ;@ TRAPV exception\n");\r
+ ot(" movne r0,#7 ;@ TRAPV exception\n");\r
ot(" blne Exception\n");\r
- OpEnd(0x10);\r
+ opend_op_changes_cycles = 1;\r
+ OpEnd(0x10,0);\r
return 0;\r
\r
case 7: // rtr\r
OpStart(op,0x10); Cycles=20;\r
PopSr(0);\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#endif\r
OpEnd(0x10);\r
return 0;\r
\r
\r
OpStart(op,(op&0x40)?0:0x10);\r
\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
ot("\n");\r
- EaCalc(11,0x003f,sea,0);\r
+ EaCalc(12,0x003f,sea,0);\r
\r
- ot(";@ Jump - Get new PC from r0\n");\r
- if (op&0x40)\r
+ ot(";@ Jump - Get new PC from r12\n");\r
+ ot(" add r0,r12,r11 ;@ Memory Base + New PC\n");\r
+ ot("\n");\r
+ CheckPc();\r
+ if (!(op&0x40))\r
{\r
- // Jmp - Get new PC from r11\r
- ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");\r
- ot("\n");\r
+ ot(" ldr r2,[r7,#0x3c]\n");\r
+ ot(" sub r1,r4,r11 ;@ r1 = Old PC\n");\r
}\r
- else\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ // jsr prefetches next instruction before pushing old PC,\r
+ // according to http://pasti.fxatari.com/68kdocs/68kPrefetch.html\r
+ ot(" mov r4,r0\n");\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#else\r
+ ot(" bic r4,r0,#1\n");\r
+#endif\r
+\r
+ if (!(op&0x40))\r
{\r
- ot(";@ Jsr - Push old PC first\n");\r
- ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
- ot(" mov r1,r1,lsl #8\n");\r
- ot(" ldr r0,[r7,#0x3c]\n");\r
- ot(" mov r1,r1,asr #8\n");\r
- ot(";@ Push r1 onto stack\n");\r
- ot(" sub r0,r0,#4 ;@ Predecrement A7\n");\r
+ ot(";@ Push old PC onto stack\n");\r
+ ot(" sub r0,r2,#4 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,2);\r
- ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");\r
- ot("\n");\r
}\r
\r
- CheckPc(0);\r
-\r
Cycles=(op&0x40) ? 4 : 12;\r
Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);\r
\r
// --------------------- Opcodes 0x50c8+ ---------------------\r
\r
// ARM version of 68000 condition codes:\r
-static char *Cond[16]=\r
+static const char * const Cond[16]=\r
{\r
"", "", "hi","ls","cc","cs","ne","eq",\r
"vc","vs","pl","mi","ge","lt","gt","le"\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" beq DbraTrue\n\n");\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" bne DbraTrue\n\n");\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(";@ If so, don't dbra\n");\r
ot(" b%s DbraTrue\n\n",Cond[cc]);\r
break;\r
ot(";@ Check if Dn.w is -1\n");\r
ot(" cmn r0,#1\n");\r
\r
-#if USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA\r
+#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" beq DbraMin1\n");\r
ot("\n");\r
\r
ot(";@ Get Branch offset:\n");\r
ot(" ldrsh r0,[r4]\n");\r
- ot(" add r0,r4,r0 ;@ r4 = New PC\n");\r
- CheckPc(0);\r
+ ot(" add r0,r4,r0 ;@ r0 = New PC\n");\r
+ CheckPc();\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" mov r4,r0\n");\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#else\r
+ ot(" bic r4,r0,#1\n");\r
+#endif\r
#else\r
ot("\n");\r
ot(";@ Get Branch offset:\n");\r
OpEnd();\r
}\r
\r
-#if USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA\r
+#if (USE_CHECKPC_CALLBACK && USE_CHECKPC_DBRA) || EMULATE_ADDRESS_ERRORS_JUMP\r
if (op==0x51c8)\r
{\r
ot(";@ Dn.w is -1:\n");\r
int size=0,use=0,checkpc=0;\r
int offset=0;\r
int cc=0;\r
- char *asr_r11="";\r
+ const char *asr_r11="";\r
\r
offset=(char)(op&0xff);\r
cc=(op>>8)&15;\r
OpStart(op,size?0x10:0);\r
Cycles=10; // Assume branch taken\r
\r
- if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
-\r
switch (cc)\r
{\r
case 0: // T\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" bne BccDontBranch%i\n\n",8<<size);\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" beq BccDontBranch%i\n\n",8<<size);\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(" b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);\r
break;\r
}\r
if (cc==1)\r
{\r
ot(";@ Bsr - remember old PC\n");\r
- ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
- if (size) ot(" add r1,r1,#%d\n",1<<size);\r
- ot(" mov r1,r1, lsl #8\n");\r
+ ot(" ldr r12,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" ldr r2,[r7,#0x3c]\n");\r
- ot(" mov r1,r1, asr #8\n");\r
+ ot(" sub r1,r4,r12 ;@ r1 = Old PC\n");\r
+ if (size) ot(" add r1,r1,#%d\n",1<<size);\r
ot("\n");\r
ot(";@ Push r1 onto stack\n");\r
ot(" sub r0,r2,#4 ;@ Predecrement A7\n");\r
#if USE_CHECKPC_CALLBACK\r
if (offset==-1) checkpc=1;\r
#endif\r
- if (checkpc)\r
- {\r
- CheckPc(0);\r
- }\r
- else\r
- {\r
- ot(" bic r4,r0,#1\n"); // we do not emulate address errors\r
- ot("\n");\r
- }\r
+ if (checkpc) CheckPc();\r
+#if EMULATE_ADDRESS_ERRORS_JUMP\r
+ ot(" mov r4,r0\n");\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+#else\r
+ ot(" bic r4,r0,#1\n");\r
+#endif\r
+ ot("\n");\r
\r
OpEnd(size?0x10:0);\r
\r