* Mega Drive system. As VDP chip in these systems had control of the bus,\r
* several instructions were acting differently, for example TAS did'n have\r
* the write-back phase. That will be emulated, if this option is enabled.\r
- * This option also alters timing slightly.\r
*/\r
#define CYCLONE_FOR_GENESIS 0\r
\r
#define MEMHANDLERS_CHANGE_FLAGS 0\r
#define MEMHANDLERS_CHANGE_CYCLES 0\r
\r
+/*\r
+ * If the following macro is defined, Cyclone no longer calls read*, write*,\r
+ * fetch* and checkpc from it's context, it calls these functions directly\r
+ * instead, prefixed with prefix selected below. For example, if\r
+ * MEMHANDLERS_DIRECT_PREFIX is set to cyclone_, it will call cyclone_read8\r
+ * on byte reads.\r
+ * This is to avoid indirect jumps, which are slower. It also saves one ARM\r
+ * instruction.\r
+ */\r
+/* MEMHANDLERS_DIRECT_PREFIX "cyclone_" */\r
+\r
/*\r
* If enabled, Cyclone will call .IrqCallback routine from it's context whenever it\r
* acknowledges an IRQ. IRQ level (.irq) is not cleared automatically, do this in your\r
\r
/*\r
* When this option is enabled Cyclone will do two word writes instead of one\r
- * long write when handling MOVE.L with pre-decrementing destination, as described in\r
- * Bart Trzynadlowski's doc (http://www.trzy.org/files/68knotes.txt).\r
+ * long write when handling MOVE.L or MOVEM.L with pre-decrementing destination,\r
+ * as described in Bart Trzynadlowski's doc (http://www.trzy.org/files/68knotes.txt).\r
* Enable this if you are emulating a 16 bit system.\r
*/\r
#define SPLIT_MOVEL_PD 1\r