#include "../frontend/main.h"
#include "mem.h"
+#include "plugin.h"
#if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
#error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
static bool use_lightrec_interpreter;
static bool use_pcsx_interpreter;
-static bool lightrec_debug;
-static bool lightrec_very_debug;
static bool booting;
-static u32 lightrec_begin_cycles;
enum my_cp2_opcodes {
OP_CP2_RTPS = 0x01,
static bool has_interrupt(void)
{
+ struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
+
return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
- (psxRegs.CP0.n.Status & 0x401) == 0x401) ||
- (psxRegs.CP0.n.Status & psxRegs.CP0.n.Cause & 0x0300);
+ (regs->cp0[12] & 0x401) == 0x401) ||
+ (regs->cp0[12] & regs->cp0[13] & 0x0300);
}
static void lightrec_restore_state(struct lightrec_state *state)
memcpy(cache_buf, psxM, sizeof(cache_buf));
}
+static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
+{
+ switch (size) {
+ case 8:
+ switch (kaddr) {
+ case 0x1f801040:
+ case 0x1f801050:
+ case 0x1f801800:
+ case 0x1f801801:
+ case 0x1f801802:
+ case 0x1f801803:
+ return false;
+ default:
+ return true;
+ }
+ case 16:
+ switch (kaddr) {
+ case 0x1f801040:
+ case 0x1f801044:
+ case 0x1f801048:
+ case 0x1f80104a:
+ case 0x1f80104e:
+ case 0x1f801050:
+ case 0x1f801054:
+ case 0x1f80105a:
+ case 0x1f80105e:
+ case 0x1f801100:
+ case 0x1f801104:
+ case 0x1f801108:
+ case 0x1f801110:
+ case 0x1f801114:
+ case 0x1f801118:
+ case 0x1f801120:
+ case 0x1f801124:
+ case 0x1f801128:
+ return false;
+ case 0x1f801070:
+ case 0x1f801074:
+ return !is_write;
+ default:
+ return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
+ }
+ default:
+ switch (kaddr) {
+ case 0x1f801040:
+ case 0x1f801050:
+ case 0x1f801100:
+ case 0x1f801104:
+ case 0x1f801108:
+ case 0x1f801110:
+ case 0x1f801114:
+ case 0x1f801118:
+ case 0x1f801120:
+ case 0x1f801124:
+ case 0x1f801128:
+ case 0x1f801810:
+ case 0x1f801814:
+ case 0x1f801820:
+ case 0x1f801824:
+ return false;
+ case 0x1f801070:
+ case 0x1f801074:
+ case 0x1f801088:
+ case 0x1f801098:
+ case 0x1f8010a8:
+ case 0x1f8010b8:
+ case 0x1f8010c8:
+ case 0x1f8010e8:
+ case 0x1f8010f4:
+ return !is_write;
+ default:
+ return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
+ }
+ }
+}
+
static const struct lightrec_ops lightrec_ops = {
.cop2_op = cop2_op,
.enable_ram = lightrec_enable_ram,
+ .hw_direct = lightrec_can_hw_direct,
};
static int lightrec_plugin_init(void)
lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
lightrec_map[PSX_MAP_BIOS].address = psxR;
lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
+ lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
if (LIGHTREC_CUSTOM_MAP) {
lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
}
- lightrec_debug = !!getenv("LIGHTREC_DEBUG");
- lightrec_very_debug = !!getenv("LIGHTREC_VERY_DEBUG");
use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
- if (getenv("LIGHTREC_BEGIN_CYCLES"))
- lightrec_begin_cycles = (unsigned int) strtol(
- getenv("LIGHTREC_BEGIN_CYCLES"), NULL, 0);
lightrec_state = lightrec_init(name,
lightrec_map, ARRAY_SIZE(lightrec_map),
return 0;
}
-static u32 hash_calculate_le(const void *buffer, u32 count)
-{
- unsigned int i;
- u32 *data = (u32 *) buffer;
- u32 hash = 0xffffffff;
-
- count /= 4;
- for(i = 0; i < count; ++i) {
- hash += LE32TOH(data[i]);
- hash += (hash << 10);
- hash ^= (hash >> 6);
- }
-
- hash += (hash << 3);
- hash ^= (hash >> 11);
- hash += (hash << 15);
- return hash;
-}
-
-static u32 hash_calculate(const void *buffer, u32 count)
-{
- unsigned int i;
- u32 *data = (u32 *) buffer;
- u32 hash = 0xffffffff;
-
- count /= 4;
- for(i = 0; i < count; ++i) {
- hash += data[i];
- hash += (hash << 10);
- hash ^= (hash >> 6);
- }
-
- hash += (hash << 3);
- hash ^= (hash >> 11);
- hash += (hash << 15);
- return hash;
-}
-
-static const char * const mips_regs[] = {
- "zero",
- "at",
- "v0", "v1",
- "a0", "a1", "a2", "a3",
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
- "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
- "t8", "t9",
- "k0", "k1",
- "gp", "sp", "fp", "ra",
- "lo", "hi",
-};
-
-static void print_for_big_ass_debugger(void)
-{
- unsigned int i;
-
- printf("CYCLE 0x%08x PC 0x%08x", psxRegs.cycle, psxRegs.pc);
-
- if (lightrec_very_debug)
- printf(" RAM 0x%08x SCRATCH 0x%08x HW 0x%08x",
- hash_calculate_le(psxM, 0x200000),
- hash_calculate_le(psxH, 0x400),
- hash_calculate_le(psxH + 0x1000, 0x2000));
-
- printf(" CP0 0x%08x CP2D 0x%08x CP2C 0x%08x INT 0x%04x INTCYCLE 0x%08x GPU 0x%08x",
- hash_calculate(&psxRegs.CP0.r,
- sizeof(psxRegs.CP0.r)),
- hash_calculate(&psxRegs.CP2D.r,
- sizeof(psxRegs.CP2D.r)),
- hash_calculate(&psxRegs.CP2C.r,
- sizeof(psxRegs.CP2C.r)),
- psxRegs.interrupt,
- hash_calculate(psxRegs.intCycle,
- sizeof(psxRegs.intCycle)),
- LE32TOH(HW_GPU_STATUS));
-
- if (lightrec_very_debug)
- for (i = 0; i < 34; i++)
- printf(" %s 0x%08x", mips_regs[i], psxRegs.GPR.r[i]);
- else
- printf(" GPR 0x%08x", hash_calculate(&psxRegs.GPR.r,
- sizeof(psxRegs.GPR.r)));
- printf("\n");
-}
-
static void lightrec_dump_regs(struct lightrec_state *state)
{
struct lightrec_registers *regs = lightrec_get_registers(state);
extern void intExecuteBlock();
extern void gen_interupt();
-static void lightrec_plugin_execute_block(void)
+static void lightrec_plugin_execute_internal(bool block_only)
{
- u32 old_pc = psxRegs.pc;
u32 flags;
gen_interupt();
+ // step during early boot so that 0x80030000 fastboot hack works
+ booting = block_only;
+ if (block_only)
+ next_interupt = psxRegs.cycle;
+
if (use_pcsx_interpreter) {
intExecuteBlock();
} else {
lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
lightrec_restore_regs(lightrec_state);
- if (unlikely(use_lightrec_interpreter))
+ if (unlikely(use_lightrec_interpreter)) {
psxRegs.pc = lightrec_run_interpreter(lightrec_state,
- psxRegs.pc);
- // step during early boot so that 0x80030000 fastboot hack works
- else if (unlikely(booting || lightrec_debug))
- psxRegs.pc = lightrec_execute_one(lightrec_state,
- psxRegs.pc);
- else
+ psxRegs.pc,
+ next_interupt);
+ } else {
psxRegs.pc = lightrec_execute(lightrec_state,
psxRegs.pc, next_interupt);
+ }
psxRegs.cycle = lightrec_current_cycle_count(lightrec_state);
if (flags & LIGHTREC_EXIT_SYSCALL)
psxException(0x20, 0);
-
- if (booting && (psxRegs.pc & 0xff800000) == 0x80000000)
- booting = false;
}
- if (lightrec_debug && psxRegs.cycle >= lightrec_begin_cycles
- && psxRegs.pc != old_pc)
- print_for_big_ass_debugger();
-
if ((psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x300) &&
(psxRegs.CP0.n.Status & 0x1)) {
/* Handle software interrupts */
{
extern int stop;
+ if (!booting)
+ lightrec_plugin_sync_regs_from_pcsx();
+
while (!stop)
- lightrec_plugin_execute_block();
+ lightrec_plugin_execute_internal(false);
+
+ lightrec_plugin_sync_regs_to_pcsx();
+}
+
+static void lightrec_plugin_execute_block(void)
+{
+ lightrec_plugin_execute_internal(true);
}
static void lightrec_plugin_clear(u32 addr, u32 size)
{
struct lightrec_registers *regs;
- lightrec_plugin_shutdown();
- lightrec_plugin_init();
-
regs = lightrec_get_registers(lightrec_state);
+ /* Invalidate all blocks */
+ lightrec_invalidate_all(lightrec_state);
+
+ /* Reset registers */
+ memset(regs, 0, sizeof(*regs));
+
regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
-
- booting = true;
}
-void lightrec_plugin_prepare_load_state(void)
+void lightrec_plugin_sync_regs_from_pcsx(void)
{
struct lightrec_registers *regs;
lightrec_invalidate_all(lightrec_state);
}
-void lightrec_plugin_prepare_save_state(void)
+void lightrec_plugin_sync_regs_to_pcsx(void)
{
struct lightrec_registers *regs;