0,
0};
-static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
-
/* Linker */
static void set_jump_target(void *addr, void *target_)
output_w32(0xe5900000|rd_rn_rm(rt,15,0));
}
+#ifdef HAVE_ARMV7
static void emit_movw(u_int imm,u_int rt)
{
assert(imm<65536);
assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
}
+#endif
static void emit_movimm(u_int imm,u_int rt)
{
static void emit_loadreg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit load in 32bit mode!\n");
- assert(0);
- return;
- }
- if((r&63)==0)
+ assert(hr != EXCLUDE_REG);
+ if (r == 0)
emit_zeroreg(hr);
else {
- int addr = (int)&psxRegs.GPR.r[r];
+ void *addr;
switch (r) {
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
- case CCREG: addr = (int)&cycle_count; break;
- case CSREG: addr = (int)&Status; break;
- case INVCP: addr = (int)&invc_ptr; break;
- case ROREG: addr = (int)&ram_offset; break;
- default: assert(r < 34); break;
+ case CCREG: addr = &cycle_count; break;
+ case CSREG: addr = &Status; break;
+ case INVCP: addr = &invc_ptr; break;
+ case ROREG: addr = &ram_offset; break;
+ default:
+ assert(r < 34);
+ addr = &psxRegs.GPR.r[r];
+ break;
}
- u_int offset = addr-(u_int)&dynarec_local;
+ u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
+ assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
}
}
static void emit_storereg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit store in 32bit mode!\n");
- assert(0);
- return;
- }
+ assert(hr != EXCLUDE_REG);
int addr = (int)&psxRegs.GPR.r[r];
switch (r) {
//case HIREG: addr = &hi; break;
}
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[hr],offset);
+ assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
}
emit_loadlp(target,0);
emit_loadlp((u_int)addr,1);
- assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
+ assert(ndrc->translation_cache <= addr &&
+ addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
//assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
//DEBUG >
#ifdef DEBUG_CYCLE_COUNT
{
int rs=get_reg(regmap,target);
int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg(regmap,-1);
+ if(rs<0) rs=get_reg_temp(regmap);
assert(rs>=0);
u_int is_dynamic;
uintptr_t host_addr = 0;
static void inline_writestub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,-1);
+ int rs=get_reg_temp(regmap);
int rt=get_reg(regmap,target);
assert(rs>=0);
assert(rt>=0);
}
#else
if(cv==3&&shift)
- emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
+ emit_far_call(gteMVMVA_part_cv3sh12_arm);
else {
emit_movimm(shift,1);
- emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+ emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
}
if(need_flags||need_ir)
c2op_call_MACtoIR(lm,need_flags);