#include "pcnt.h"
#include "arm_features.h"
-void do_memhandler_pre();
-void do_memhandler_post();
-
/* Linker */
static void set_jump_target(void *addr, void *target)
{
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
+{
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Special alloc */
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
case CCREG: addr = &cycle_count; break;
- case CSREG: addr = &psxRegs.CP0.n.SR; break;
case INVCP: addr = &invc_ptr; is64 = 1; break;
case ROREG: addr = &ram_offset; is64 = 1; break;
default:
static void inline_readstub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,target);
- int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg_temp(regmap);
- assert(rs>=0);
+ int ra = cinfo[i].addr;
+ int rt = get_reg(regmap, target);
+ assert(ra >= 0);
u_int is_dynamic=0;
uintptr_t host_addr = 0;
void *handler;
int cc=get_reg(regmap,CCREG);
- //if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
+ //if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
// return;
handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
if (handler == NULL) {
if(rt<0||dops[i].rt1==0)
return;
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch(type) {
- case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
- case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
- case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
- case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
- case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
+ case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
+ case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
+ case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
+ case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
+ case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
default: assert(0);
}
return;
save_regs(reglist);
if(target==0)
emit_movimm(addr,0);
- else if(rs!=0)
- emit_mov(rs,0);
+ else if(ra!=0)
+ emit_mov(ra,0);
if(cc<0)
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,adj,2);
static void inline_writestub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs = get_reg_temp(regmap);
+ int ra = cinfo[i].addr;
int rt = get_reg(regmap,target);
- assert(rs >= 0);
+ assert(ra >= 0);
assert(rt >= 0);
uintptr_t host_addr = 0;
void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
if (handler == NULL) {
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch (type) {
- case STOREB_STUB: emit_writebyte_indexed(rt, 0, rs); break;
- case STOREH_STUB: emit_writehword_indexed(rt, 0, rs); break;
- case STOREW_STUB: emit_writeword_indexed(rt, 0, rs); break;
+ case STOREB_STUB: emit_writebyte_indexed(rt, 0, ra); break;
+ case STOREH_STUB: emit_writehword_indexed(rt, 0, ra); break;
+ case STOREW_STUB: emit_writeword_indexed(rt, 0, ra); break;
default: assert(0);
}
return;
// call a memhandler
save_regs(reglist);
- emit_writeword(rs, &address); // some handlers still need it
+ emit_writeword(ra, &address); // some handlers still need it
loadstore_extend(type, rt, 0);
int cc, cc_use;
cc = cc_use = get_reg(regmap, CCREG);
}
#define multdiv_assemble multdiv_assemble_arm64
+// wb_dirtys making use of stp when possible
+static void wb_dirtys(const signed char i_regmap[], u_int i_dirty)
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r <= 0 || r == CCREG)
+ continue;
+ if (!((i_dirty >> hr) & 1))
+ continue;
+ assert(r < 34u);
+ mregs[r] = hr;
+ }
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(1, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_storereg(r, mregs[r]);
+ }
+}
+#define wb_dirtys wb_dirtys
+
+static void load_all_regs(const signed char i_regmap[])
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r < 0 || r == CCREG)
+ continue;
+ if ((u_int)r < 34u)
+ mregs[r] = hr;
+ else if (r < TEMPREG)
+ emit_loadreg(r, hr);
+ }
+ if (mregs[0] >= 0)
+ emit_zeroreg(mregs[0]); // we could use arm64's ZR instead of reg alloc
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(0, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_loadreg(r, mregs[r]);
+ }
+}
+#define load_all_regs load_all_regs
+
static void do_jump_vaddr(u_int rs)
{
if (rs != 0)