} dops[MAXBLOCK];
static u_char *out;
+ static char invalid_code[0x100000];
static struct ht_entry hash_table[65536];
static struct block_info *blocks[PAGE_COUNT];
static struct jump_info *jumps[PAGE_COUNT];
#define NO_CYCLE_PENALTY_THR 12
-int cycle_multiplier = CYCLE_MULT_DEFAULT; // 100 for 1.0
-int cycle_multiplier_override;
int cycle_multiplier_old;
static int cycle_multiplier_active;
return ndrc_get_addr_ht(vaddr);
// generate an address error
- Status|=2;
- Cause=(vaddr<<31)|(4<<2);
- EPC=(vaddr&1)?vaddr-5:vaddr;
- BadVAddr=(vaddr&~1);
+ psxRegs.CP0.n.Status |= 2;
+ psxRegs.CP0.n.Cause = (vaddr<<31) | (4<<2);
+ psxRegs.CP0.n.EPC = (vaddr&1) ? vaddr-5 : vaddr;
+ psxRegs.CP0.n.BadVAddr = vaddr & ~1;
return ndrc_get_addr_ht(0x80000080);
}
emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
emit_addimm(HOST_CCREG,ccadj_,HOST_CCREG);
- emit_writeword(HOST_CCREG,&Count);
+ emit_writeword(HOST_CCREG,&psxRegs.cycle);
}
// What a mess. The status register (12) can enable interrupts,
// so needs a special case to handle a pending interrupt.
emit_movimm(copr,0);
emit_far_call(pcsx_mtc0);
if(copr==9||copr==11||copr==12||copr==13) {
- emit_readword(&Count,HOST_CCREG);
+ emit_readword(&psxRegs.cycle,HOST_CCREG);
emit_readword(&next_interupt,HOST_TEMPREG);
emit_addimm(HOST_CCREG,-ccadj_,HOST_CCREG);
emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
assert(dops[i].opcode2==0x10);
//if((source[i]&0x3f)==0x10) // RFE
{
- emit_readword(&Status,0);
+ emit_readword(&psxRegs.CP0.n.Status,0);
emit_andimm(0,0x3c,1);
emit_andimm(0,~0xf,0);
emit_orrshr_imm(1,2,0);
- emit_writeword(0,&Status);
+ emit_writeword(0,&psxRegs.CP0.n.Status);
}
}
}
//else {printf("fp exception in delay slot\n");}
wb_dirtys(i_regs->regmap_entry,i_regs->wasdirty);
if(regs[i].regmap_entry[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
- emit_movimm(start+(i-ds)*4,EAX); // Get PC
+ emit_movimm(start+(i-ds)*4,0); // Get PC
emit_addimm(HOST_CCREG,ccadj[i],HOST_CCREG); // CHECK: is this right? There should probably be an extra cycle...
emit_far_jump(ds?fp_exception_ds:fp_exception);
}
static void hlecall_assemble(int i, const struct regstat *i_regs, int ccadj_)
{
- void *hlefunc = psxNULL;
+ void *hlefunc = gteNULL;
uint32_t hleCode = source[i] & 0x03ffffff;
if (hleCode < ARRAY_SIZE(psxHLEt))
hlefunc = psxHLEt[hleCode];
if(stubs[n].c!=-1)
{
// Save PC as return address
- emit_movimm(stubs[n].c,EAX);
- emit_writeword(EAX,&pcaddr);
+ emit_movimm(stubs[n].c,0);
+ emit_writeword(0,&pcaddr);
}
else
{
stat_clear(stat_blocks);
stat_clear(stat_links);
- cycle_multiplier_old = cycle_multiplier;
+ cycle_multiplier_old = Config.cycle_multiplier;
new_dynarec_hacks_old = new_dynarec_hacks;
}
#endif
#endif
out = ndrc->translation_cache;
- cycle_multiplier=200;
new_dynarec_clear_full();
#ifdef HOST_IMM8
// Copy this into local area so we don't have to put it in every literal pool
(0xbfc00000 <= addr && addr < 0xbfc80000)))
{
// BIOS. The multiplier should be much higher as it's uncached 8bit mem,
- // but timings in PCSX are too tied to the interpreter's BIAS
+ // but timings in PCSX are too tied to the interpreter's 2-per-insn assumption
if (!HACK_ENABLED(NDHACK_OVERRIDE_CYCLE_M))
cycle_multiplier_active = 200;
return 0;
}
- cycle_multiplier_active = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT
- ? cycle_multiplier_override : cycle_multiplier;
+ cycle_multiplier_active = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
+ ? Config.cycle_multiplier_override : Config.cycle_multiplier;
source = get_source_start(start, &pagelimit);
if (source == NULL) {