*/
#include "psxhw.h"
+#include "psxevents.h"
#include "mdec.h"
#include "cdrom.h"
#include "gpu.h"
mdecInit(); // initialize mdec decoder
cdrReset();
psxRcntInit();
- HW_GPU_STATUS = SWAP32(0x14802000);
- psxHwReadGpuSRptr = Config.hacks.gpu_busy_hack
+ HW_GPU_STATUS = SWAP32(0x10802000);
+ psxHwReadGpuSRptr = Config.hacks.gpu_busy
? psxHwReadGpuSRbusyHack : psxHwReadGpuSR;
}
if (stat & value) {
//if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
// log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
- new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
+ set_event(PSXINT_NEWDRC_CHECK, 1);
}
psxRegs.CP0.n.Cause &= ~0x400;
if (stat & value)
void psxHwWriteGpuSR(u32 value)
{
+ u32 old_sr = HW_GPU_STATUS, new_sr;
GPU_writeStatus(value);
gpuSyncPluginSR();
+ new_sr = HW_GPU_STATUS;
+ // "The Next Tetris" seems to rely on the field order after enable
+ if ((old_sr ^ new_sr) & new_sr & SWAP32(PSXGPU_ILACE))
+ frame_counter |= 1;
}
u32 psxHwReadGpuSR(void)
{
- u32 v;
+ u32 v, c = psxRegs.cycle;
// meh2, syncing for img bit, might want to avoid it..
gpuSyncPluginSR();
v = SWAP32(HW_GPU_STATUS);
+ v |= ((s32)(psxRegs.gpuIdleAfter - c) >> 31) & PSXGPU_nBUSY;
// XXX: because of large timeslices can't use hSyncCount, using rough
// approximization instead. Perhaps better use hcounter code here or something.
if (hSyncCount < 240 && (v & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
- v |= PSXGPU_LCF & (psxRegs.cycle << 20);
+ v |= PSXGPU_LCF & (c << 20);
return v;
}
void psxHwWrite8(u32 add, u8 value) {
switch (add & 0x1fffffff) {
- case 0x1f801040: sioWrite8(value); break;\r
+ case 0x1f801040: sioWrite8(value); break;
+ case 0x1f8010f6:
+ // nocash documents it as forced w32, but still games use this?
+ break;
case 0x1f801800: cdrWrite0(value); break;
case 0x1f801801: cdrWrite1(value); break;
case 0x1f801802: cdrWrite2(value); break;
case 0x1f801803: cdrWrite3(value); break;
- case 0x1f801041: case 0x1f801042: case 0x1f801043:
- case 0x1f801044: case 0x1f801045:
- case 0x1f801046: case 0x1f801047:
- case 0x1f801048: case 0x1f801049:
- case 0x1f80104a: case 0x1f80104b:
- case 0x1f80104c: case 0x1f80104d:
- case 0x1f80104e: case 0x1f80104f:
- case 0x1f801050: case 0x1f801051:
- case 0x1f801054: case 0x1f801055:
- case 0x1f801058: case 0x1f801059:
- case 0x1f80105a: case 0x1f80105b:
- case 0x1f80105c: case 0x1f80105d:
- case 0x1f801100: case 0x1f801101:
- case 0x1f801104: case 0x1f801105:
- case 0x1f801108: case 0x1f801109:
- case 0x1f801110: case 0x1f801111:
- case 0x1f801114: case 0x1f801115:
- case 0x1f801118: case 0x1f801119:
- case 0x1f801120: case 0x1f801121:
- case 0x1f801124: case 0x1f801125:
- case 0x1f801128: case 0x1f801129:
case 0x1f801810: case 0x1f801811:
case 0x1f801812: case 0x1f801813:
case 0x1f801814: case 0x1f801815:
SPU_writeRegister(add, value, psxRegs.cycle);
return;
}
+ else if (0x1f801000 <= add && add < 0x1f801800)
+ log_unhandled("unhandled w8 %08x @%08x\n", add, psxRegs.pc);
psxHu8(add) = value;
#ifdef PSXHW_LOG