}
void psxReset() {
- psxCpu->Reset();
-
psxMemReset();
memset(&psxRegs, 0, sizeof(psxRegs));
psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
+ psxCpu->Reset();
+
psxHwReset();
psxBiosInit();
gpuotcInterrupt();
}
}
+ if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
+ cdrDmaInterrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
+ cdrPlayInterrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
+ cdrLidSeekInterrupt();
+ }
+ }
}
if (psxHu32(0x1070) & psxHu32(0x1074)) {