// Pico Library - Internal Header File\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved.\r
+// (c) Copyright 2006-2009 Grazvydas "notaz" Ignotas, all rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
#include "cpu/sh2mame/sh2.h"\r
\r
SH2 msh2, ssh2;\r
-#define ash2_pc() msh2.ppc\r
#define ash2_end_run(after) sh2_icount = after\r
\r
#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
// 32X\r
#define P32XS_FM (1<<15)\r
#define P32XS2_ADEN (1<< 9)\r
-#define P32XS_FULL (1<< 7)\r
+#define P32XS_FULL (1<< 7) // DREQ FIFO full\r
#define P32XS_68S (1<< 2)\r
#define P32XS_RV (1<< 0)\r
\r
-#define P32XV_nPAL (1<<15)\r
+#define P32XV_nPAL (1<<15) // VDP\r
#define P32XV_PRI (1<< 7)\r
#define P32XV_Mx (3<< 0) // display mode mask\r
\r
#define P32XV_nFEN (1<< 1)\r
#define P32XV_FS (1<< 0)\r
\r
+#define P32XP_FULL (1<<15) // PWM\r
+#define P32XP_EMPTY (1<<14)\r
+\r
#define P32XF_68KPOLL (1 << 0)\r
#define P32XF_MSH2POLL (1 << 1)\r
#define P32XF_SSH2POLL (1 << 2)\r
\r
// real one is 4*2, but we use more because we don't lockstep\r
#define DMAC_FIFO_LEN (4*4)\r
+#define PWM_BUFF_LEN 1024 // in one channel samples\r
\r
struct Pico32x\r
{\r
unsigned int sh2irqs; // common irqs\r
unsigned short dmac_fifo[DMAC_FIFO_LEN];\r
unsigned int dmac_ptr;\r
+ unsigned int pwm_irq_sample_cnt;\r
};\r
\r
struct Pico32xMem\r
{\r
unsigned char sdram[0x40000];\r
- unsigned short dram[2][0x20000/2]; // AKA fb\r
- unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE\r
+ unsigned short dram[2][0x20000/2]; // AKA fb\r
+ unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE\r
+ unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)\r
unsigned char sh2_rom_m[0x800];\r
unsigned char sh2_rom_s[0x400];\r
unsigned short pal[0x100];\r
- unsigned short pal_native[0x100]; // converted to native (for renderer)\r
+ unsigned short pal_native[0x100]; // converted to native (for renderer)\r
unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s\r
+ signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame\r
};\r
\r
// area.c\r
extern struct PicoSRAM SRam;\r
extern int PicoPadInt[2];\r
extern int emustatus;\r
+extern int scanlines_total;\r
extern void (*PicoResetHook)(void);\r
extern void (*PicoLineHook)(void);\r
PICO_INTERNAL int CheckDMA(void);\r
// 32x/draw.c\r
void FinalizeLine32xRGB555(int sh, int line);\r
\r
+// 32x/pwm.c\r
+unsigned int p32x_pwm_read16(unsigned int a);\r
+void p32x_pwm_write16(unsigned int a, unsigned int d);\r
+void p32x_pwm_refresh(void);\r
+void p32x_pwm_irq_check(void);\r
+void p32x_pwm_update(int *buf32, int length, int stereo);\r
+extern int pwm_frame_smp_cnt;\r
+\r
/* avoid dependency on newer glibc */\r
static __inline int isspace_(int c)\r
{\r