+#include <stddef.h>
#include "pico_int.h"
-#include "sound/sn76496.h"
+#include "memory.h"
-#define Z80_MEM_SHIFT 13
-
-unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT];
-unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
-
-void MEMH_FUNC z80_map_set(unsigned long *map, int start_addr, int end_addr,
- void *func_or_mh, int is_func)
-{
- unsigned long addr = (unsigned long)func_or_mh;
- int mask = (1 << Z80_MEM_SHIFT) - 1;
- int i;
-
- if ((start_addr & mask) != 0 || (end_addr & mask) != mask)
- elprintf(EL_STATUS|EL_ANOMALY, "z80_map_set: tried to map bad range: %04x-%04x",
- start_addr, end_addr);
-
- if (addr & 1) {
- elprintf(EL_STATUS|EL_ANOMALY, "z80_map_set: ptr is not aligned: %08lx", addr);
- return;
- }
-
- for (i = start_addr >> Z80_MEM_SHIFT; i <= end_addr >> Z80_MEM_SHIFT; i++)
- if (is_func)
- map[i] = (addr >> 1) | (1 << (sizeof(addr) * 8 - 1));
- else
- map[i] = (addr - (i << Z80_MEM_SHIFT)) >> 1;
-}
+uptr z80_read_map [0x10000 >> Z80_MEM_SHIFT];
+uptr z80_write_map[0x10000 >> Z80_MEM_SHIFT];
#ifdef _USE_MZ80
drZ80.Z80IM = 0; // 1?
drZ80.z80irqvector = 0xff0000; // RST 38h
drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1;
- drZ80.Z80SP_BASE = z80_read_map[0] << 1;
+ // drZ80 is locked in single bank
+ drZ80.Z80SP_BASE = ((PicoAHW & PAHW_SMS) ?
+ z80_read_map[0xc000 >> Z80_MEM_SHIFT] : z80_read_map[0]) << 1;
// drZ80.Z80SP = drZ80.z80_rebaseSP(0x2000); // 0xf000 ?
#endif
#ifdef _USE_CZ80
Cz80_Set_Reg(&CZ80, CZ80_IY, 0xffff);
Cz80_Set_Reg(&CZ80, CZ80_SP, 0x2000);
#endif
- Pico.m.z80_fakeval = 0; // for faking when Z80 is disabled
}
// XXX TODO: should better use universal z80 save format
#elif defined(_USE_CZ80)
*(int *)data = 0x00007a43; // "Cz"
*(int *)(data+4) = Cz80_Get_Reg(&CZ80, CZ80_PC);
- memcpy(data+8, &CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80);
+ memcpy(data+8, &CZ80, offsetof(cz80_struc, BasePC));
#endif
}
}
#elif defined(_USE_CZ80)
if (*(int *)data == 0x00007a43) { // "Cz" save?
- memcpy(&CZ80, data+8, (INT32)&CZ80.BasePC - (INT32)&CZ80);
+ memcpy(&CZ80, data+8, offsetof(cz80_struc, BasePC));
Cz80_Set_Reg(&CZ80, CZ80_PC, *(int *)(data+4));
} else {
z80_reset();
#if defined(_USE_DRZ80)
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);
#elif defined(_USE_CZ80)
- sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", CZ80.PC - CZ80.BasePC, CZ80.SP.W);
+ sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", (unsigned int)(CZ80.PC - CZ80.BasePC), CZ80.SP.W);
#endif
}