- CycloneSetSr(&PicoCpu, *(unsigned int *)(cpu+0x44));\r
- PicoCpu.osp=*(unsigned int *)(cpu+0x48);\r
- memcpy(PicoCpu.d,cpu,0x40);\r
- PicoCpu.membase=0;\r
- PicoCpu.pc =PicoCpu.checkpc(pc); // Base pc\r
+ struct Cyclone *context = is_sub ? &PicoCpuS68k : &PicoCpu;\r
+ CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r
+ context->osp=*(unsigned int *)(cpu+0x48);\r
+ memcpy(context->d,cpu,0x40);\r
+ context->membase=0;\r
+ context->pc = context->checkpc(*(unsigned int *)(cpu+0x40)); // Base pc\r
+ context->irq = cpu[0x4c];\r
+ context->stopped = cpu[0x4d];\r