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bugfixes in sram memhandlers
[picodrive.git]
/
Pico
/
Memory.c
diff --git
a/Pico/Memory.c
b/Pico/Memory.c
index
2b86924
..
ecc34c2
100644
(file)
--- a/
Pico/Memory.c
+++ b/
Pico/Memory.c
@@
-7,7
+7,7
@@
// For commercial use, separate licencing terms must be obtained.
\r
\r
\r
// For commercial use, separate licencing terms must be obtained.
\r
\r
\r
-#define __debug_io
\r
+
//
#define __debug_io
\r
\r
#include "PicoInt.h"
\r
\r
\r
#include "PicoInt.h"
\r
\r
@@
-28,7
+28,6
@@
u32 PicoRead8(u32 a);
u32 PicoRead16(u32 a);
\r
void PicoWrite8(u32 a,u8 d);
\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);
\r
u32 PicoRead16(u32 a);
\r
void PicoWrite8(u32 a,u8 d);
\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);
\r
-void PicoWriteRomHW_in1 (u32 a,u32 d);
\r
#endif
\r
\r
\r
#endif
\r
\r
\r
@@
-142,16
+141,33
@@
static
u32 SRAMRead(u32 a)
\r
{
\r
unsigned int sreg = Pico.m.sram_reg;
\r
u32 SRAMRead(u32 a)
\r
{
\r
unsigned int sreg = Pico.m.sram_reg;
\r
- if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
\r
+ if
(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM
\r
elprintf(EL_SRAMIO, "normal sram detected.");
\r
Pico.m.sram_reg|=0x10; // should be normal SRAM
\r
}
\r
elprintf(EL_SRAMIO, "normal sram detected.");
\r
Pico.m.sram_reg|=0x10; // should be normal SRAM
\r
}
\r
- if(sreg & 4) // EEPROM read
\r
+ if
(sreg & 4) // EEPROM read
\r
return SRAMReadEEPROM();
\r
else // if(sreg & 1) // (sreg&5) is one of prerequisites
\r
return *(u8 *)(SRam.data-SRam.start+a);
\r
}
\r
\r
return SRAMReadEEPROM();
\r
else // if(sreg & 1) // (sreg&5) is one of prerequisites
\r
return *(u8 *)(SRam.data-SRam.start+a);
\r
}
\r
\r
+#ifndef _ASM_MEMORY_C
\r
+static
\r
+#endif
\r
+u32 SRAMRead16(u32 a)
\r
+{
\r
+ u32 d;
\r
+ if (Pico.m.sram_reg & 4) {
\r
+ d = SRAMReadEEPROM();
\r
+ d |= d << 8;
\r
+ } else {
\r
+ u8 *pm=(u8 *)(SRam.data-SRam.start+a);
\r
+ d =*pm++ << 8;
\r
+ d|=*pm++;
\r
+ }
\r
+ return d;
\r
+}
\r
+
\r
static void SRAMWrite(u32 a, u32 d)
\r
{
\r
unsigned int sreg = Pico.m.sram_reg;
\r
static void SRAMWrite(u32 a, u32 d)
\r
{
\r
unsigned int sreg = Pico.m.sram_reg;
\r
@@
-324,7
+340,7
@@
PICO_INTERNAL_ASM u32 PicoRead8(u32 a)
\r
#ifndef EMU_CORE_DEBUG
\r
// sram
\r
\r
#ifndef EMU_CORE_DEBUG
\r
// sram
\r
- if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
+ if
(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
d = SRAMRead(a);
\r
elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
\r
goto end;
\r
d = SRAMRead(a);
\r
elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
\r
goto end;
\r
@@
-335,14
+351,17
@@
PICO_INTERNAL_ASM u32 PicoRead8(u32 a)
log_io(a, 8, 0);
\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
\r
\r
log_io(a, 8, 0);
\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
\r
\r
- d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;
\r
+ if ((a&0xe700e0)==0xc00000) // VDP
\r
+ d=PicoVideoRead(a);
\r
+ else d=OtherRead16(a&~1, 8);
\r
+ if ((a&1)==0) d>>=8;
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
- if
(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/
) {
\r
+ if
(a>=Pico.romsize
) {
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = (u8)d;
\r
}
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = (u8)d;
\r
}
\r
@@
-360,9
+379,8
@@
PICO_INTERNAL_ASM u32 PicoRead16(u32 a)
\r
#ifndef EMU_CORE_DEBUG
\r
// sram
\r
\r
#ifndef EMU_CORE_DEBUG
\r
// sram
\r
- if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
- d = SRAMRead(a);
\r
- d |= d<<8;
\r
+ if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
+ d = SRAMRead16(a);
\r
elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
\r
goto end;
\r
}
\r
elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
\r
goto end;
\r
}
\r
@@
-371,14
+389,16
@@
PICO_INTERNAL_ASM u32 PicoRead16(u32 a)
if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom
\r
log_io(a, 16, 0);
\r
\r
if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom
\r
log_io(a, 16, 0);
\r
\r
- d = OtherRead16(a, 16);
\r
+ if ((a&0xe700e0)==0xc00000)
\r
+ d = PicoVideoRead(a);
\r
+ else d = OtherRead16(a, 16);
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
- if
(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/
) {
\r
+ if
(a>=Pico.romsize
) {
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = d;
\r
}
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = d;
\r
}
\r
@@
-396,8
+416,7
@@
PICO_INTERNAL_ASM u32 PicoRead32(u32 a)
\r
// sram
\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
\r
// sram
\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {
\r
- d = (SRAMRead(a)<<16)|SRAMRead(a+2);
\r
- d |= d<<8;
\r
+ d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);
\r
elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);
\r
goto end;
\r
}
\r
elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);
\r
goto end;
\r
}
\r
@@
-405,14
+424,16
@@
PICO_INTERNAL_ASM u32 PicoRead32(u32 a)
if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom
\r
log_io(a, 32, 0);
\r
\r
if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom
\r
log_io(a, 32, 0);
\r
\r
- d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
+ if ((a&0xe700e0)==0xc00000)
\r
+ d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);
\r
+ else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
\r
end:
\r
#ifdef __debug_io
\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
- if
(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/
) {
\r
+ if
(a>=Pico.romsize
) {
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = d;
\r
}
\r
lastread_a = a;
\r
lastread_d[lrp_cyc++&15] = d;
\r
}
\r
@@
-424,7
+445,7
@@
end:
// -----------------------------------------------------------------
\r
// Write Ram
\r
\r
// -----------------------------------------------------------------
\r
// Write Ram
\r
\r
-#if
ndef _ASM_MEMORY_C
\r
+#if
!defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
\r
PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)
\r
{
\r
#ifdef __debug_io
\r
PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)
\r
{
\r
#ifdef __debug_io
\r
@@
-455,6
+476,7
@@
void PicoWrite16(u32 a,u16 d)
log_io(a, 16, 1);
\r
\r
a&=0xfffffe;
\r
log_io(a, 16, 1);
\r
\r
a&=0xfffffe;
\r
+ if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP
\r
OtherWrite16(a,d);
\r
}
\r
\r
OtherWrite16(a,d);
\r
}
\r
\r
@@
-477,6
+499,14
@@
static void PicoWrite32(u32 a,u32 d)
log_io(a, 32, 1);
\r
\r
a&=0xfffffe;
\r
log_io(a, 32, 1);
\r
\r
a&=0xfffffe;
\r
+ if ((a&0xe700e0)==0xc00000)
\r
+ {
\r
+ // VDP:
\r
+ PicoVideoWrite(a, (u16)(d>>16));
\r
+ PicoVideoWrite(a+2,(u16)d);
\r
+ return;
\r
+ }
\r
+
\r
OtherWrite16(a, (u16)(d>>16));
\r
OtherWrite16(a+2,(u16)d);
\r
}
\r
OtherWrite16(a, (u16)(d>>16));
\r
OtherWrite16(a+2,(u16)d);
\r
}
\r
@@
-526,33
+556,36
@@
unsigned int m68k_read_pcrelative_CD16(unsigned int a);
unsigned int m68k_read_pcrelative_CD32(unsigned int a);
\r
\r
// these are allowed to access RAM
\r
unsigned int m68k_read_pcrelative_CD32(unsigned int a);
\r
\r
// these are allowed to access RAM
\r
-static unsigned int m68k_read_8 (unsigned int a, int do_fake) {
\r
+static unsigned int m68k_read_8 (unsigned int a, int do_fake)
\r
+{
\r
a&=0xffffff;
\r
a&=0xffffff;
\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);
\r
- if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom
\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
+ if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);
\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
return 0;
\r
}
\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
return 0;
\r
}
\r
-static unsigned int m68k_read_16(unsigned int a, int do_fake) {
\r
+static unsigned int m68k_read_16(unsigned int a, int do_fake)
\r
+{
\r
a&=0xffffff;
\r
a&=0xffffff;
\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);
\r
- if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom
\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
+ if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);
\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
return 0;
\r
}
\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
return 0;
\r
}
\r
-static unsigned int m68k_read_32(unsigned int a, int do_fake) {
\r
+static unsigned int m68k_read_32(unsigned int a, int do_fake)
\r
+{
\r
a&=0xffffff;
\r
a&=0xffffff;
\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);
\r
- if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
#ifdef EMU_CORE_DEBUG
\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];
\r
#endif
\r
+ if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);
\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
return 0;
\r
}
\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
return 0;
\r
}
\r
@@
-571,7
+604,8
@@
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a,
unsigned int m68k_read_memory_8(unsigned int a)
\r
{
\r
u8 d;
\r
unsigned int m68k_read_memory_8(unsigned int a)
\r
{
\r
u8 d;
\r
- if(a<Pico.romsize) d = *(u8 *) (Pico.rom+(a^1));
\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)
\r
+ d = *(u8 *) (Pico.rom+(a^1));
\r
else d = (u8) lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
else d = (u8) lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
@@
-581,7
+615,8
@@
unsigned int m68k_read_memory_8(unsigned int a)
unsigned int m68k_read_memory_16(unsigned int a)
\r
{
\r
u16 d;
\r
unsigned int m68k_read_memory_16(unsigned int a)
\r
{
\r
u16 d;
\r
- if(a<Pico.romsize) d = *(u16 *)(Pico.rom+(a&~1));
\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)
\r
+ d = *(u16 *)(Pico.rom+(a&~1));
\r
else d = (u16) lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
else d = (u16) lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
@@
-591,7
+626,9
@@
unsigned int m68k_read_memory_16(unsigned int a)
unsigned int m68k_read_memory_32(unsigned int a)
\r
{
\r
u32 d;
\r
unsigned int m68k_read_memory_32(unsigned int a)
\r
{
\r
u32 d;
\r
- if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1];}
\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)
\r
+ { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }
\r
+ else if (a <= 0x78) d = m68k_read_32(a, 0);
\r
else d = lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
else d = lastread_d[lrp_mus++&15];
\r
#ifdef __debug_io
\r
dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
@@
-654,10
+691,6
@@
PICO_INTERNAL unsigned char z80_read(unsigned short a)
{
\r
u8 ret = 0;
\r
\r
{
\r
u8 ret = 0;
\r
\r
-#ifndef _USE_DRZ80
\r
- if (a<0x4000) return Pico.zram[a&0x1fff];
\r
-#endif
\r
-
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
\r
{
\r
if (PicoOpt&1) ret = (u8) YM2612Read();
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
\r
{
\r
if (PicoOpt&1) ret = (u8) YM2612Read();
\r
@@
-666,19
+699,20
@@
PICO_INTERNAL unsigned char z80_read(unsigned short a)
\r
if (a>=0x8000)
\r
{
\r
\r
if (a>=0x8000)
\r
{
\r
+ extern u32 PicoReadM68k8(u32 a);
\r
u32 addr68k;
\r
addr68k=Pico.m.z80_bank68k<<15;
\r
addr68k+=a&0x7fff;
\r
\r
u32 addr68k;
\r
addr68k=Pico.m.z80_bank68k<<15;
\r
addr68k+=a&0x7fff;
\r
\r
- ret = (u8) PicoRead8(addr68k);
\r
+ if (PicoMCD & 1)
\r
+ ret = PicoReadM68k8(addr68k);
\r
+ else ret = PicoRead8(addr68k);
\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
\r
return ret;
\r
}
\r
\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
\r
return ret;
\r
}
\r
\r
-#ifdef _USE_DRZ80
\r
- // should not be needed || dprintf("z80_read RAM");
\r
+ // should not be needed, cores should be able to access RAM themselves
\r
if (a<0x4000) return Pico.zram[a&0x1fff];
\r
if (a<0x4000) return Pico.zram[a&0x1fff];
\r
-#endif
\r
\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);
\r
return ret;
\r
\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);
\r
return ret;
\r
@@
-690,10
+724,6
@@
PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)
\r
#endif
\r
{
\r
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)
\r
#endif
\r
{
\r
-#ifndef _USE_DRZ80
\r
- if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }
\r
-#endif
\r
-
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
\r
{
\r
if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)
\r
{
\r
if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;
\r
@@
-716,18
+746,19
@@
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)
\r
if (a>=0x8000)
\r
{
\r
\r
if (a>=0x8000)
\r
{
\r
+ extern void PicoWriteM68k8(u32 a,u8 d);
\r
u32 addr68k;
\r
addr68k=Pico.m.z80_bank68k<<15;
\r
addr68k+=a&0x7fff;
\r
elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
\r
u32 addr68k;
\r
addr68k=Pico.m.z80_bank68k<<15;
\r
addr68k+=a&0x7fff;
\r
elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
\r
- PicoWrite8(addr68k, data);
\r
+ if (PicoMCD & 1)
\r
+ PicoWriteM68k8(addr68k, data);
\r
+ else PicoWrite8(addr68k, data);
\r
return;
\r
}
\r
\r
return;
\r
}
\r
\r
-#ifdef _USE_DRZ80
\r
- // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);
\r
+ // should not be needed
\r
if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }
\r
if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }
\r
-#endif
\r
\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
\r
}
\r
\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
\r
}
\r