- if(sreg & 0x20) {\r
- // X24C02+\r
- if(ssa&1) {\r
- //dprintf("read: addr %02x, cycle %i, reg %02x", saddr, scyc, sreg);\r
- d = (SRam.data[saddr]>>shift)&1;\r
- }\r
- } else {\r
- // X24C01\r
- if(saddr&1) {\r
- d = (SRam.data[saddr>>1]>>shift)&1;\r
- }\r
- }\r
+ if (SRam.eeprom_type) {\r
+ // X24C02+\r
+ if (ssa&1) {\r
+ elprintf(EL_EEPROM, "eeprom: read: addr %02x, cycle %i, reg %02x", saddr, scyc, sreg);\r
+ if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", SRam.data[saddr]);\r
+ d = (SRam.data[saddr]>>shift)&1;\r
+ }\r
+ } else {\r
+ // X24C01\r
+ if (saddr&1) {\r
+ elprintf(EL_EEPROM, "eeprom: read: addr %02x, cycle %i, reg %02x", saddr>>1, scyc, sreg);\r
+ if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", SRam.data[saddr>>1]);\r
+ d = (SRam.data[saddr>>1]>>shift)&1;\r
+ }\r
+ }\r