+#define SSP_OFFS_GR 0x400
+#define SSP_PM0 8
+#define SSP_PC 6
+#define SSP_OFFS_EMUSTAT 0x484 // emu_status
+#define SSP_OFFS_IRAM_DIRTY 0x494
+#define SSP_OFFS_IRAM_CTX 0x498 // iram_context
+#define SSP_OFFS_BLTAB 0x49c // block_table
+#define SSP_OFFS_BLTAB_IRAM 0x4a0
+#define SSP_OFFS_TMP0 0x4a4
+#define SSP_WAIT_PM0 0x2000
+
+
+ssp_drc_entry:
+ stmfd sp!, {r4-r11, lr}
+ mov r11, r0
+ bl ssp_regfile_load
+
+ssp_drc_next:
+ cmp r11, #0
+ bmi ssp_drc_end
+
+ ldr r0, [r7, #(SSP_OFFS_GR+SSP_PC*4)]
+ mov r0, r0, lsr #16
+ str r0, [r7, #SSP_OFFS_TMP0]
+ cmp r0, #0x400
+ blt ssp_de_iram
+
+ ldr r1, [r7, #SSP_OFFS_BLTAB]
+ ldr r1, [r1, r0, lsl #2]
+ tst r1, r1
+ bxne r1
+ bl ssp_translate_block
+ ldr r2, [r7, #SSP_OFFS_TMP0] @ entry PC
+ ldr r1, [r7, #SSP_OFFS_BLTAB]
+ str r0, [r1, r2, lsl #2]
+ bx r0
+
+ssp_de_iram:
+ ldr r1, [r7, #SSP_OFFS_IRAM_DIRTY]
+ tst r1, r1
+ ldreq r1, [r7, #SSP_OFFS_IRAM_CTX]
+ beq ssp_de_iram_ctx
+
+ bl ssp_get_iram_context
+ mov r1, #0
+ str r1, [r7, #SSP_OFFS_IRAM_DIRTY]
+ mov r1, r0
+ str r1, [r7, #SSP_OFFS_IRAM_CTX]
+ ldr r0, [r7, #SSP_OFFS_TMP0] @ entry PC
+
+ssp_de_iram_ctx:
+ ldr r2, [r7, #SSP_OFFS_BLTAB_IRAM]
+ add r2, r2, r1, lsl #12 @ block_tab_iram + iram_context * 0x800/2*4
+ add r2, r2, r0, lsl #2
+ ldr r1, [r2]
+ tst r1, r1
+ bxne r1
+ str r2, [r7, #SSP_OFFS_TMP0]
+ bl ssp_translate_block
+ ldr r2, [r7, #SSP_OFFS_TMP0] @ &block_table_iram[iram_context][rPC]
+ str r0, [r2]
+ bx r0
+
+ssp_drc_end:
+ bl ssp_regfile_store
+ mov r0, r11
+ ldmfd sp!, {r4-r11, lr}
+ bx lr
+
+