- unsigned int d[8]; // [r7,#0x00]\r
- unsigned int a[8]; // [r7,#0x20]\r
- unsigned int pc; // [r7,#0x40] Memory Base+PC\r
- unsigned char srh; // [r7,#0x44] Status Register high (T_S__III)\r
- unsigned char xc; // [r7,#0x45] Extend flag (____??X?)\r
- unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]\r
- unsigned char irq; // [r7,#0x47] IRQ level\r
- unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)\r
- unsigned int vector; // [r7,#0x4c] IRQ vector (temporary)\r
- unsigned int prev_pc;// [r7,#0x50] set to start address of currently executed opcode (if enabled in config.h)\r
- unsigned int unused; // [r7,#0x54] Unused\r
- int stopped; // [r7,#0x58] 1 == processor is in stopped state\r
- int cycles; // [r7,#0x5c]\r
- int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)\r
- unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] - Called to recalc Memory Base+pc\r
- unsigned char (*read8 )(unsigned int a); // [r7,#0x68]\r
- unsigned short (*read16 )(unsigned int a); // [r7,#0x6c]\r
- unsigned int (*read32 )(unsigned int a); // [r7,#0x70]\r
+ unsigned int d[8]; // [r7,#0x00]\r
+ unsigned int a[8]; // [r7,#0x20]\r
+ unsigned int pc; // [r7,#0x40] Memory Base (.membase) + 68k PC\r
+ unsigned char srh; // [r7,#0x44] Status Register high (T_S__III)\r
+ unsigned char unused; // [r7,#0x45] Unused\r
+ unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]\r
+ unsigned char irq; // [r7,#0x47] IRQ level\r
+ unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)\r
+ unsigned int xc; // [r7,#0x4c] Extend flag (bit29: ??X? _)\r
+ unsigned int prev_pc; // [r7,#0x50] Set to start address of currently executed opcode + 2 (if enabled in config.h)\r
+ unsigned int jumptab; // [r7,#0x54] Jump table pointer\r
+ int state_flags; // [r7,#0x58] bit: 0: stopped state, 1: trace state, 2: activity bit, 3: addr error, 4: fatal halt\r
+ int cycles; // [r7,#0x5c] Number of cycles to execute - 1. Updates to cycles left after CycloneRun()\r
+ int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)\r
+ unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] called to recalc Memory Base+pc\r
+ unsigned int (*read8 )(unsigned int a); // [r7,#0x68]\r
+ unsigned int (*read16 )(unsigned int a); // [r7,#0x6c]\r
+ unsigned int (*read32 )(unsigned int a); // [r7,#0x70]\r