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continuing input framework integration
[picodrive.git]
/
cpu
/
Cyclone
/
OpBranch.cpp
diff --git
a/cpu/Cyclone/OpBranch.cpp
b/cpu/Cyclone/OpBranch.cpp
index
0a2b3ec
..
061fe01
100644
(file)
--- a/
cpu/Cyclone/OpBranch.cpp
+++ b/
cpu/Cyclone/OpBranch.cpp
@@
-47,7
+47,7
@@
static void PopSr(int high)
OpRegToFlags(high);
\r
}
\r
\r
OpRegToFlags(high);
\r
}
\r
\r
-// Pop PC -
assumes r11=Memory Base -
trashes r0-r3
\r
+// Pop PC - trashes r0-r3
\r
static void PopPc()
\r
{
\r
ot(";@ Pop PC:\n");
\r
static void PopPc()
\r
{
\r
ot(";@ Pop PC:\n");
\r
@@
-55,7
+55,8
@@
static void PopPc()
ot(" add r1,r0,#4 ;@ Postincrement A7\n");
\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
MemHandler(0,2);
\r
ot(" add r1,r0,#4 ;@ Postincrement A7\n");
\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
MemHandler(0,2);
\r
- ot(" add r0,r0,r11 ;@ Memory Base+PC\n");
\r
+ ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");
\r
+ ot(" add r0,r0,r1 ;@ Memory Base+PC\n");
\r
ot("\n");
\r
CheckPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot("\n");
\r
CheckPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
@@
-175,7
+176,6
@@
int Op4E70(int op)
case 3: // rte
\r
OpStart(op,0x10,0,0,1); Cycles=20;
\r
PopSr(1);
\r
case 3: // rte
\r
OpStart(op,0x10,0,0,1); Cycles=20;
\r
PopSr(1);
\r
- ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");
\r
SuperChange(op,1);
\r
PopPc();
\r
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");
\r
SuperChange(op,1);
\r
@@
-195,7
+195,6
@@
int Op4E70(int op)
\r
case 5: // rts
\r
OpStart(op,0x10); Cycles=16;
\r
\r
case 5: // rts
\r
OpStart(op,0x10); Cycles=16;
\r
- ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
@@
-217,7
+216,6
@@
int Op4E70(int op)
case 7: // rtr
\r
OpStart(op,0x10); Cycles=20;
\r
PopSr(0);
\r
case 7: // rtr
\r
OpStart(op,0x10); Cycles=20;
\r
PopSr(0);
\r
- ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
@@
-290,7
+288,7
@@
int OpJsr(int op)
// --------------------- Opcodes 0x50c8+ ---------------------
\r
\r
// ARM version of 68000 condition codes:
\r
// --------------------- Opcodes 0x50c8+ ---------------------
\r
\r
// ARM version of 68000 condition codes:
\r
-static c
har *
Cond[16]=
\r
+static c
onst char * const
Cond[16]=
\r
{
\r
"", "", "hi","ls","cc","cs","ne","eq",
\r
"vc","vs","pl","mi","ge","lt","gt","le"
\r
{
\r
"", "", "hi","ls","cc","cs","ne","eq",
\r
"vc","vs","pl","mi","ge","lt","gt","le"
\r
@@
-404,7
+402,7
@@
int OpBranch(int op)
int size=0,use=0,checkpc=0;
\r
int offset=0;
\r
int cc=0;
\r
int size=0,use=0,checkpc=0;
\r
int offset=0;
\r
int cc=0;
\r
- char *asr_r11="";
\r
+ c
onst c
har *asr_r11="";
\r
\r
offset=(char)(op&0xff);
\r
cc=(op>>8)&15;
\r
\r
offset=(char)(op&0xff);
\r
cc=(op>>8)&15;
\r