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[picodrive.git]
/
cpu
/
Cyclone
/
OpBranch.cpp
diff --git
a/cpu/Cyclone/OpBranch.cpp
b/cpu/Cyclone/OpBranch.cpp
index
d29ed03
..
ce5ae70
100644
(file)
--- a/
cpu/Cyclone/OpBranch.cpp
+++ b/
cpu/Cyclone/OpBranch.cpp
@@
-47,7
+47,7
@@
static void PopSr(int high)
OpRegToFlags(high);
\r
}
\r
\r
OpRegToFlags(high);
\r
}
\r
\r
-// Pop PC -
assumes r10=Memory Base -
trashes r0-r3
\r
+// Pop PC - trashes r0-r3
\r
static void PopPc()
\r
{
\r
ot(";@ Pop PC:\n");
\r
static void PopPc()
\r
{
\r
ot(";@ Pop PC:\n");
\r
@@
-55,7
+55,8
@@
static void PopPc()
ot(" add r1,r0,#4 ;@ Postincrement A7\n");
\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
MemHandler(0,2);
\r
ot(" add r1,r0,#4 ;@ Postincrement A7\n");
\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
MemHandler(0,2);
\r
- ot(" add r0,r0,r10 ;@ Memory Base+PC\n");
\r
+ ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");
\r
+ ot(" add r0,r0,r1 ;@ Memory Base+PC\n");
\r
ot("\n");
\r
CheckPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot("\n");
\r
CheckPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
@@
-97,13
+98,13
@@
int OpLink(int op)
\r
if(reg!=7) {
\r
ot(";@ Get An\n");
\r
\r
if(reg!=7) {
\r
ot(";@ Get An\n");
\r
- EaCalc(1
0
, 7, 8, 2, 1);
\r
- EaRead(1
0
, 1, 8, 2, 7, 1);
\r
+ EaCalc(1
1
, 7, 8, 2, 1);
\r
+ EaRead(1
1
, 1, 8, 2, 7, 1);
\r
}
\r
\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
\r
ot(" sub r0,r0,#4 ;@ A7-=4\n");
\r
}
\r
\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
\r
ot(" sub r0,r0,#4 ;@ A7-=4\n");
\r
- ot(" mov r
11,r0
\n");
\r
+ ot(" mov r
8,r0 ;@ abuse r8
\n");
\r
if(reg==7) ot(" mov r1,r0\n");
\r
ot("\n");
\r
\r
if(reg==7) ot(" mov r1,r0\n");
\r
ot("\n");
\r
\r
@@
-112,14
+113,14
@@
int OpLink(int op)
\r
ot(";@ Save to An\n");
\r
if(reg!=7)
\r
\r
ot(";@ Save to An\n");
\r
if(reg!=7)
\r
- EaWrite(1
0,11
, 8, 2, 7, 1);
\r
+ EaWrite(1
1,8
, 8, 2, 7, 1);
\r
\r
ot(";@ Get offset:\n");
\r
\r
ot(";@ Get offset:\n");
\r
- EaCalc(0,0,0x3c,1);
\r
+ EaCalc(0,0,0x3c,1);
// abused r8 is ok because of imm EA
\r
EaRead(0,0,0x3c,1,0);
\r
\r
EaRead(0,0,0x3c,1,0);
\r
\r
- ot(" add r
11,r11
,r0 ;@ Add offset to A7\n");
\r
- ot(" str r
11
,[r7,#0x3c]\n");
\r
+ ot(" add r
8,r8
,r0 ;@ Add offset to A7\n");
\r
+ ot(" str r
8
,[r7,#0x3c]\n");
\r
ot("\n");
\r
\r
Cycles=16;
\r
ot("\n");
\r
\r
Cycles=16;
\r
@@
-138,18
+139,18
@@
int OpUnlk(int op)
OpStart(op,0x10);
\r
\r
ot(";@ Get An\n");
\r
OpStart(op,0x10);
\r
\r
ot(";@ Get An\n");
\r
- EaCalc(1
0
, 0xf, 8, 2, 1);
\r
- EaRead(1
0
, 0, 8, 2, 0xf, 1);
\r
+ EaCalc(1
1
, 0xf, 8, 2, 1);
\r
+ EaRead(1
1
, 0, 8, 2, 0xf, 1);
\r
\r
\r
- ot(" add r
11,r0,#4 ;@ A7+=4
\n");
\r
+ ot(" add r
8,r0,#4 ;@ A7+=4, abuse r8
\n");
\r
ot("\n");
\r
ot(";@ Pop An from stack:\n");
\r
MemHandler(0,2);
\r
ot("\n");
\r
ot("\n");
\r
ot(";@ Pop An from stack:\n");
\r
MemHandler(0,2);
\r
ot("\n");
\r
- ot(" str r
11
,[r7,#0x3c] ;@ Save A7\n");
\r
+ ot(" str r
8
,[r7,#0x3c] ;@ Save A7\n");
\r
ot("\n");
\r
ot(";@ An = value from stack:\n");
\r
ot("\n");
\r
ot(";@ An = value from stack:\n");
\r
- EaWrite(1
0
, 0, 8, 2, 7, 1);
\r
+ EaWrite(1
1
, 0, 8, 2, 7, 1);
\r
\r
Cycles=12;
\r
OpEnd(0x10);
\r
\r
Cycles=12;
\r
OpEnd(0x10);
\r
@@
-175,7
+176,6
@@
int Op4E70(int op)
case 3: // rte
\r
OpStart(op,0x10,0,0,1); Cycles=20;
\r
PopSr(1);
\r
case 3: // rte
\r
OpStart(op,0x10,0,0,1); Cycles=20;
\r
PopSr(1);
\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");
\r
SuperChange(op,1);
\r
PopPc();
\r
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");
\r
SuperChange(op,1);
\r
@@
-195,7
+195,6
@@
int Op4E70(int op)
\r
case 5: // rts
\r
OpStart(op,0x10); Cycles=16;
\r
\r
case 5: // rts
\r
OpStart(op,0x10); Cycles=16;
\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
@@
-206,7
+205,7
@@
int Op4E70(int op)
\r
case 6: // trapv
\r
OpStart(op,0x10,0,1); Cycles=4;
\r
\r
case 6: // trapv
\r
OpStart(op,0x10,0,1); Cycles=4;
\r
- ot(" tst r
9
,#0x10000000\n");
\r
+ ot(" tst r
10
,#0x10000000\n");
\r
ot(" subne r5,r5,#%i\n",34);
\r
ot(" movne r0,#7 ;@ TRAPV exception\n");
\r
ot(" blne Exception\n");
\r
ot(" subne r5,r5,#%i\n",34);
\r
ot(" movne r0,#7 ;@ TRAPV exception\n");
\r
ot(" blne Exception\n");
\r
@@
-217,7
+216,6
@@
int Op4E70(int op)
case 7: // rtr
\r
OpStart(op,0x10); Cycles=20;
\r
PopSr(0);
\r
case 7: // rtr
\r
OpStart(op,0x10); Cycles=20;
\r
PopSr(0);
\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
PopPc();
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
ot(" tst r4,#1 ;@ address error?\n");
\r
@@
-248,18
+246,18
@@
int OpJsr(int op)
\r
OpStart(op,(op&0x40)?0:0x10);
\r
\r
\r
OpStart(op,(op&0x40)?0:0x10);
\r
\r
- ot(" ldr r1
0
,[r7,#0x60] ;@ Get Memory base\n");
\r
+ ot(" ldr r1
1
,[r7,#0x60] ;@ Get Memory base\n");
\r
ot("\n");
\r
ot("\n");
\r
- EaCalc(1
1
,0x003f,sea,0);
\r
+ EaCalc(1
2
,0x003f,sea,0);
\r
\r
\r
- ot(";@ Jump - Get new PC from r1
1
\n");
\r
- ot(" add r0,r1
1,r10
;@ Memory Base + New PC\n");
\r
+ ot(";@ Jump - Get new PC from r1
2
\n");
\r
+ ot(" add r0,r1
2,r11
;@ Memory Base + New PC\n");
\r
ot("\n");
\r
CheckPc();
\r
if (!(op&0x40))
\r
{
\r
ot(" ldr r2,[r7,#0x3c]\n");
\r
ot("\n");
\r
CheckPc();
\r
if (!(op&0x40))
\r
{
\r
ot(" ldr r2,[r7,#0x3c]\n");
\r
- ot(" sub r1,r4,r1
0
;@ r1 = Old PC\n");
\r
+ ot(" sub r1,r4,r1
1
;@ r1 = Old PC\n");
\r
}
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
// jsr prefetches next instruction before pushing old PC,
\r
}
\r
#if EMULATE_ADDRESS_ERRORS_JUMP
\r
// jsr prefetches next instruction before pushing old PC,
\r
@@
-314,16
+312,16
@@
int OpDbra(int op)
case 1: // F
\r
break;
\r
case 2: // hi
\r
case 1: // F
\r
break;
\r
case 2: // hi
\r
- ot(" tst r
9
,#0x60000000 ;@ hi: !C && !Z\n");
\r
+ ot(" tst r
10
,#0x60000000 ;@ hi: !C && !Z\n");
\r
ot(" beq DbraTrue\n\n");
\r
break;
\r
case 3: // ls
\r
ot(" beq DbraTrue\n\n");
\r
break;
\r
case 3: // ls
\r
- ot(" tst r
9
,#0x60000000 ;@ ls: C || Z\n");
\r
+ ot(" tst r
10
,#0x60000000 ;@ ls: C || Z\n");
\r
ot(" bne DbraTrue\n\n");
\r
break;
\r
default:
\r
ot(";@ Is the condition true?\n");
\r
ot(" bne DbraTrue\n\n");
\r
break;
\r
default:
\r
ot(";@ Is the condition true?\n");
\r
- ot(" msr cpsr_flg,r
9
;@ ARM flags = 68000 flags\n");
\r
+ ot(" msr cpsr_flg,r
10
;@ ARM flags = 68000 flags\n");
\r
ot(";@ If so, don't dbra\n");
\r
ot(" b%s DbraTrue\n\n",Cond[cc]);
\r
break;
\r
ot(";@ If so, don't dbra\n");
\r
ot(" b%s DbraTrue\n\n",Cond[cc]);
\r
break;
\r
@@
-421,24
+419,22
@@
int OpBranch(int op)
OpStart(op,size?0x10:0);
\r
Cycles=10; // Assume branch taken
\r
\r
OpStart(op,size?0x10:0);
\r
Cycles=10; // Assume branch taken
\r
\r
- if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
-
\r
switch (cc)
\r
{
\r
case 0: // T
\r
case 1: // F
\r
break;
\r
case 2: // hi
\r
switch (cc)
\r
{
\r
case 0: // T
\r
case 1: // F
\r
break;
\r
case 2: // hi
\r
- ot(" tst r
9
,#0x60000000 ;@ hi: !C && !Z\n");
\r
+ ot(" tst r
10
,#0x60000000 ;@ hi: !C && !Z\n");
\r
ot(" bne BccDontBranch%i\n\n",8<<size);
\r
break;
\r
case 3: // ls
\r
ot(" bne BccDontBranch%i\n\n",8<<size);
\r
break;
\r
case 3: // ls
\r
- ot(" tst r
9
,#0x60000000 ;@ ls: C || Z\n");
\r
+ ot(" tst r
10
,#0x60000000 ;@ ls: C || Z\n");
\r
ot(" beq BccDontBranch%i\n\n",8<<size);
\r
break;
\r
default:
\r
ot(";@ Is the condition true?\n");
\r
ot(" beq BccDontBranch%i\n\n",8<<size);
\r
break;
\r
default:
\r
ot(";@ Is the condition true?\n");
\r
- ot(" msr cpsr_flg,r
9
;@ ARM flags = 68000 flags\n");
\r
+ ot(" msr cpsr_flg,r
10
;@ ARM flags = 68000 flags\n");
\r
ot(" b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
\r
break;
\r
}
\r
ot(" b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
\r
break;
\r
}
\r
@@
-467,8
+463,9
@@
int OpBranch(int op)
if (cc==1)
\r
{
\r
ot(";@ Bsr - remember old PC\n");
\r
if (cc==1)
\r
{
\r
ot(";@ Bsr - remember old PC\n");
\r
+ ot(" ldr r12,[r7,#0x60] ;@ Get Memory base\n");
\r
ot(" ldr r2,[r7,#0x3c]\n");
\r
ot(" ldr r2,[r7,#0x3c]\n");
\r
- ot(" sub r1,r4,r1
0
;@ r1 = Old PC\n");
\r
+ ot(" sub r1,r4,r1
2
;@ r1 = Old PC\n");
\r
if (size) ot(" add r1,r1,#%d\n",1<<size);
\r
ot("\n");
\r
ot(";@ Push r1 onto stack\n");
\r
if (size) ot(" add r1,r1,#%d\n",1<<size);
\r
ot("\n");
\r
ot(";@ Push r1 onto stack\n");
\r