+#define SPLIT_MOVEL_PD 1\r
+\r
+/*\r
+ * Enable emulation of trace mode. Shouldn't cause any performance decrease, so it\r
+ * should be safe to keep this ON.\r
+ */\r
+#define EMULATE_TRACE 1\r
+\r
+/*\r
+ * If enabled, address error exception will be generated if 68k code jumps to an\r
+ * odd address. Causes very small performance hit (2 ARM instructions for every\r
+ * emulated jump/return/exception in normal case).\r
+ * Note: checkpc() must not clear least significant bit of rebased address\r
+ * for this to work, as checks are performed after calling checkpc().\r
+ */\r
+#define EMULATE_ADDRESS_ERRORS_JUMP 1\r
+\r
+/*\r
+ * If enabled, address error exception will be generated if 68k code tries to\r
+ * access a word or longword at an odd address. The performance cost is also 2 ARM\r
+ * instructions per access (for address error checks).\r
+ */\r
+#define EMULATE_ADDRESS_ERRORS_IO 0\r
+\r
+/*\r
+ * If an address error happens during another address error processing,\r
+ * the processor halts until it is reset (catastrophic system failure, as the manual\r
+ * states). This option enables halt emulation.\r
+ * Note that this might be not desired if it is known that emulated system should\r
+ * never reach this state.\r
+ */\r
+#define EMULATE_HALT 0\r
+\r