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32x: change ppc handling for better logging
[picodrive.git]
/
cpu
/
DrZ80
/
drz80.s
diff --git
a/cpu/DrZ80/drz80.s
b/cpu/DrZ80/drz80.s
index
08f8a19
..
499c856
100644
(file)
--- a/
cpu/DrZ80/drz80.s
+++ b/
cpu/DrZ80/drz80.s
@@
-6713,7
+6713,8
@@
opcode_DD_2E:
opcode_DD_34:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_34:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
stmfd sp!,{r0} ;@ save addr
\r
readmem8
\r
opINC8b
\r
stmfd sp!,{r0} ;@ save addr
\r
readmem8
\r
opINC8b
\r
@@
-6724,7
+6725,8
@@
opcode_DD_34:
opcode_DD_35:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_35:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
stmfd sp!,{r0} ;@ save addr
\r
readmem8
\r
opDEC8b
\r
stmfd sp!,{r0} ;@ save addr
\r
readmem8
\r
opDEC8b
\r
@@
-6736,7
+6738,8
@@
opcode_DD_36:
ldrsb r2,[z80pc],#1
\r
ldrb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
ldrsb r2,[z80pc],#1
\r
ldrb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r2,r1, lsr #16
\r
+ add r1,r1,r2, lsl #16
\r
+ mov r1,r1,lsr #16
\r
writemem8
\r
fetch 19
\r
;@ADD IX,SP
\r
writemem8
\r
fetch 19
\r
;@ADD IX,SP
\r
@@
-6767,7
+6770,8
@@
opcode_DD_45:
opcode_DD_46:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_46:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80bc,z80bc,#0xFF<<16
\r
orr z80bc,z80bc,r0, lsl #24
\r
readmem8
\r
and z80bc,z80bc,#0xFF<<16
\r
orr z80bc,z80bc,r0, lsl #24
\r
@@
-6788,7
+6792,8
@@
opcode_DD_4D:
opcode_DD_4E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_4E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80bc,z80bc,#0xFF<<24
\r
orr z80bc,z80bc,r0, lsl #16
\r
readmem8
\r
and z80bc,z80bc,#0xFF<<24
\r
orr z80bc,z80bc,r0, lsl #16
\r
@@
-6810,7
+6815,8
@@
opcode_DD_55:
opcode_DD_56:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_56:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80de,z80de,#0xFF<<16
\r
orr z80de,z80de,r0, lsl #24
\r
readmem8
\r
and z80de,z80de,#0xFF<<16
\r
orr z80de,z80de,r0, lsl #24
\r
@@
-6831,7
+6837,8
@@
opcode_DD_5D:
opcode_DD_5E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_5E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80de,z80de,#0xFF<<24
\r
orr z80de,z80de,r0, lsl #16
\r
readmem8
\r
and z80de,z80de,#0xFF<<24
\r
orr z80de,z80de,r0, lsl #16
\r
@@
-6868,7
+6875,8
@@
opcode_DD_65:
opcode_DD_66:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_66:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80hl,z80hl,#0xFF<<16
\r
orr z80hl,z80hl,r0, lsl #24
\r
readmem8
\r
and z80hl,z80hl,#0xFF<<16
\r
orr z80hl,z80hl,r0, lsl #24
\r
@@
-6910,7
+6918,8
@@
opcode_DD_6D:
opcode_DD_6E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_6E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
and z80hl,z80hl,#0xFF<<24
\r
orr z80hl,z80hl,r0, lsl #16
\r
readmem8
\r
and z80hl,z80hl,#0xFF<<24
\r
orr z80hl,z80hl,r0, lsl #16
\r
@@
-6925,7
+6934,8
@@
opcode_DD_6F:
opcode_DD_70:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_70:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80bc, lsr #24
\r
writemem8
\r
fetch 19
\r
mov r0,z80bc, lsr #24
\r
writemem8
\r
fetch 19
\r
@@
-6933,7
+6943,8
@@
opcode_DD_70:
opcode_DD_71:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_71:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80bc, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
mov r0,z80bc, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
@@
-6942,7
+6953,8
@@
opcode_DD_71:
opcode_DD_72:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_72:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80de, lsr #24
\r
writemem8
\r
fetch 19
\r
mov r0,z80de, lsr #24
\r
writemem8
\r
fetch 19
\r
@@
-6950,7
+6962,8
@@
opcode_DD_72:
opcode_DD_73:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_73:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80de, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
mov r0,z80de, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
@@
-6959,7
+6972,8
@@
opcode_DD_73:
opcode_DD_74:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_74:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80hl, lsr #24
\r
writemem8
\r
fetch 19
\r
mov r0,z80hl, lsr #24
\r
writemem8
\r
fetch 19
\r
@@
-6967,7
+6981,8
@@
opcode_DD_74:
opcode_DD_75:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_75:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80hl, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
mov r0,z80hl, lsr #16
\r
and r0,r0,#0xFF
\r
writemem8
\r
@@
-6976,7
+6991,8
@@
opcode_DD_75:
opcode_DD_77:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_77:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r1,r0,r1, lsr #16
\r
+ add r1,r1,r0, lsl #16
\r
+ mov r1,r1,lsr #16
\r
mov r0,z80a, lsr #24
\r
writemem8
\r
fetch 19
\r
mov r0,z80a, lsr #24
\r
writemem8
\r
fetch 19
\r
@@
-6995,7
+7011,8
@@
opcode_DD_7D:
opcode_DD_7E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_7E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
mov z80a,r0, lsl #24
\r
fetch 19
\r
readmem8
\r
mov z80a,r0, lsl #24
\r
fetch 19
\r
@@
-7014,7
+7031,8
@@
opcode_DD_85:
opcode_DD_86:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_86:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opADDb
\r
fetch 19
\r
readmem8
\r
opADDb
\r
fetch 19
\r
@@
-7033,7
+7051,8
@@
opcode_DD_8D:
opcode_DD_8E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_8E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opADCb
\r
fetch 19
\r
readmem8
\r
opADCb
\r
fetch 19
\r
@@
-7052,7
+7071,8
@@
opcode_DD_95:
opcode_DD_96:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_96:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opSUBb
\r
fetch 19
\r
readmem8
\r
opSUBb
\r
fetch 19
\r
@@
-7071,7
+7091,8
@@
opcode_DD_9D:
opcode_DD_9E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_9E:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opSBCb
\r
fetch 19
\r
readmem8
\r
opSBCb
\r
fetch 19
\r
@@
-7090,7
+7111,8
@@
opcode_DD_A5:
opcode_DD_A6:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_A6:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opANDb
\r
fetch 19
\r
readmem8
\r
opANDb
\r
fetch 19
\r
@@
-7109,7
+7131,8
@@
opcode_DD_AD:
opcode_DD_AE:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_AE:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opXORb
\r
fetch 19
\r
readmem8
\r
opXORb
\r
fetch 19
\r
@@
-7128,7
+7151,8
@@
opcode_DD_B5:
opcode_DD_B6:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_B6:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opORb
\r
fetch 19
\r
readmem8
\r
opORb
\r
fetch 19
\r
@@
-7147,7
+7171,8
@@
opcode_DD_BD:
opcode_DD_BE:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
opcode_DD_BE:
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
readmem8
\r
opCPb
\r
fetch 19
\r
readmem8
\r
opCPb
\r
fetch 19
\r
@@
-7159,7
+7184,8
@@
opcode_DD_CB:
;@moves the PC to the location of the subroutine
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
;@moves the PC to the location of the subroutine
\r
ldrsb r0,[z80pc],#1
\r
ldr r1,[z80xx]
\r
- add r0,r0,r1, lsr #16
\r
+ add r0,r1,r0, lsl #16
\r
+ mov r0,r0,lsr #16
\r
\r
ldrb r1,[z80pc],#1
\r
ldr pc,[pc,r1, lsl #2]
\r
\r
ldrb r1,[z80pc],#1
\r
ldr pc,[pc,r1, lsl #2]
\r