+void sh2_pack(const SH2 *sh2, unsigned char *buff);\r
+void sh2_unpack(SH2 *sh2, const unsigned char *buff);\r
+\r
+int sh2_execute_drc(SH2 *sh2c, int cycles);\r
+int sh2_execute_interpreter(SH2 *sh2c, int cycles);\r
+\r
+static inline int sh2_execute(SH2 *sh2, int cycles, int use_drc)\r
+{\r
+ int ret;\r
+\r
+ sh2->cycles_timeslice = cycles;\r
+#ifdef DRC_SH2\r
+ if (use_drc)\r
+ ret = sh2_execute_drc(sh2, cycles);\r
+ else\r
+#endif\r
+ ret = sh2_execute_interpreter(sh2, cycles);\r
+\r
+ return sh2->cycles_timeslice - ret;\r
+}\r
+\r
+// regs, pending_int*, cycles, reserved\r
+#define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4)\r
+\r
+// pico memhandlers\r
+// XXX: move somewhere else\r
+unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);\r
+unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2);\r
+unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2);\r
+void REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);\r