static bool lightrec_debug;
static bool lightrec_very_debug;
static u32 lightrec_begin_cycles;
static bool lightrec_debug;
static bool lightrec_very_debug;
static u32 lightrec_begin_cycles;
-static void cop0_mtc(struct lightrec_state *state, u8 reg, u32 value)
+static void cop0_mtc(struct lightrec_state *state, u32 op, u8 reg, u32 value)
{
cop0_mtc_ctc(state, reg, value, false);
}
{
cop0_mtc_ctc(state, reg, value, false);
}
-static void cop0_ctc(struct lightrec_state *state, u8 reg, u32 value)
+static void cop0_ctc(struct lightrec_state *state, u32 op, u8 reg, u32 value)
{
cop0_mtc_ctc(state, reg, value, true);
}
{
cop0_mtc_ctc(state, reg, value, true);
}
-static void cop2_mtc(struct lightrec_state *state, u8 reg, u32 value)
+static void cop2_mtc(struct lightrec_state *state, u32 op, u8 reg, u32 value)
{
cop2_mtc_ctc(state, reg, value, false);
}
{
cop2_mtc_ctc(state, reg, value, false);
}
-static void cop2_ctc(struct lightrec_state *state, u8 reg, u32 value)
+static void cop2_ctc(struct lightrec_state *state, u32 op, u8 reg, u32 value)
{
cop2_mtc_ctc(state, reg, value, true);
}
{
cop2_mtc_ctc(state, reg, value, true);
}
-static void hw_write_byte(struct lightrec_state *state, u32 mem, u8 val)
+static void hw_write_byte(struct lightrec_state *state,
+ u32 op, void *host, u32 mem, u8 val)
-static void hw_write_half(struct lightrec_state *state, u32 mem, u16 val)
+static void hw_write_half(struct lightrec_state *state,
+ u32 op, void *host, u32 mem, u16 val)
-static void hw_write_word(struct lightrec_state *state, u32 mem, u32 val)
+static void hw_write_word(struct lightrec_state *state,
+ u32 op, void *host, u32 mem, u32 val)
-static u16 hw_read_half(struct lightrec_state *state, u32 mem)
+static u16 hw_read_half(struct lightrec_state *state,
+ u32 op, void *host, u32 mem)
-static u32 hw_read_word(struct lightrec_state *state, u32 mem)
+static u32 hw_read_word(struct lightrec_state *state,
+ u32 op, void *host, u32 mem)
-static void cache_ctrl_write_word(struct lightrec_state *state, u32 mem, u32 val)
+static void cache_ctrl_write_word(struct lightrec_state *state,
+ u32 op, void *host, u32 mem, u32 val)
-static u32 cache_ctrl_read_word(struct lightrec_state *state, u32 mem)
+static u32 cache_ctrl_read_word(struct lightrec_state *state,
+ u32 op, void *host, u32 mem)
- lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
- lightrec_restore_registers(lightrec_state, psxRegs.GPR.r);
+ if (use_pcsx_interpreter) {
+ intExecuteBlock();
+ } else {
+ lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
+ lightrec_restore_registers(lightrec_state, psxRegs.GPR.r);
- if (use_lightrec_interpreter)
- psxRegs.pc = lightrec_run_interpreter(lightrec_state, psxRegs.pc);
- else
- psxRegs.pc = lightrec_execute_one(lightrec_state, psxRegs.pc);
+ if (use_lightrec_interpreter)
+ psxRegs.pc = lightrec_run_interpreter(lightrec_state,
+ psxRegs.pc);
+ else
+ psxRegs.pc = lightrec_execute_one(lightrec_state,
+ psxRegs.pc);
- lightrec_dump_registers(lightrec_state, psxRegs.GPR.r);
- flags = lightrec_exit_flags(lightrec_state);
+ lightrec_dump_registers(lightrec_state, psxRegs.GPR.r);
+ flags = lightrec_exit_flags(lightrec_state);
- if (flags & LIGHTREC_EXIT_SEGFAULT) {
- fprintf(stderr, "Exiting at cycle 0x%08x\n",
- psxRegs.cycle);
- exit(1);
- }
+ if (flags & LIGHTREC_EXIT_SEGFAULT) {
+ fprintf(stderr, "Exiting at cycle 0x%08x\n",
+ psxRegs.cycle);
+ exit(1);
+ }
- printf("RAM usage: IR %u KiB, CODE %u KiB, "
+ SysDLog("RAM usage: Lightrec %u KiB, IR %u KiB, CODE %u KiB, "
"MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n",
"MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n",
lightrec_get_mem_usage(MEM_FOR_IR) / 1024,
lightrec_get_mem_usage(MEM_FOR_CODE) / 1024,
lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024,
lightrec_get_mem_usage(MEM_FOR_IR) / 1024,
lightrec_get_mem_usage(MEM_FOR_CODE) / 1024,
lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024,