+.macro rcntx_read_mode0 num
+ /* r0 = address, r2 = cycles */
+ ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*\num] @ cycleStart
+ mov r0, r2, lsl #16
+ sub r0, r3, lsl #16
+ lsr r0, #16
+ bx lr
+.endm
+
+rcnt0_read_count_m0:
+ rcntx_read_mode0 0
+
+rcnt1_read_count_m0:
+ rcntx_read_mode0 1
+
+rcnt2_read_count_m0:
+ rcntx_read_mode0 2
+
+rcnt0_read_count_m1:
+ /* r0 = address, r2 = cycles */
+ ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*0] @ cycleStart
+ mov_16 r1, 0x3334
+ sub r2, r2, r3
+ mul r0, r1, r2 @ /= 5
+ lsr r0, #16
+ bx lr
+
+rcnt1_read_count_m1:
+ /* r0 = address, r2 = cycles */
+ ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*1]
+ mov_24 r1, 0x1e6cde
+ sub r2, r2, r3
+ umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
+ bx lr
+
+rcnt2_read_count_m1:
+ /* r0 = address, r2 = cycles */
+ ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*2]
+ mov r0, r2, lsl #16-3
+ sub r0, r3, lsl #16-3
+ lsr r0, #16 @ /= 8
+ bx lr
+