- psxRegs.interrupt |= 0x02000000; \
- psxRegs.intCycle[5 + 24 + 1] = eCycle; \
- psxRegs.intCycle[5 + 24] = psxRegs.cycle; \
+ psxRegs.interrupt |= (1 << PSXINT_MDECOUTDMA); \
+ psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle = eCycle; \
+ psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
+ new_dyna_set_event(PSXINT_MDECOUTDMA, eCycle); \
+}
+
+#define MDECINDMA_INT(eCycle) { \
+ psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \
+ psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \
+ psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \
+ new_dyna_set_event(PSXINT_MDECINDMA, eCycle); \
+}
+
+#define GPUOTCDMA_INT(eCycle) { \
+ psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \
+ psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \
+ psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \
+ new_dyna_set_event(PSXINT_GPUOTCDMA, eCycle); \
+}
+
+#define CDRDMA_INT(eCycle) { \
+ psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
+ psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
+ psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
+ new_dyna_set_event(PSXINT_CDRDMA, eCycle); \