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cdrom: maybe more accurate lid behavior
[pcsx_rearmed.git]
/
libpcsxcore
/
psxhw.c
diff --git
a/libpcsxcore/psxhw.c
b/libpcsxcore/psxhw.c
index
254693e
..
b8ca199
100644
(file)
--- a/
libpcsxcore/psxhw.c
+++ b/
libpcsxcore/psxhw.c
@@
-22,6
+22,7
@@
*/
#include "psxhw.h"
*/
#include "psxhw.h"
+#include "psxevents.h"
#include "mdec.h"
#include "cdrom.h"
#include "gpu.h"
#include "mdec.h"
#include "cdrom.h"
#include "gpu.h"
@@
-40,8
+41,8
@@
void psxHwReset() {
mdecInit(); // initialize mdec decoder
cdrReset();
psxRcntInit();
mdecInit(); // initialize mdec decoder
cdrReset();
psxRcntInit();
- HW_GPU_STATUS = SWAP32(0x1
4
802000);
- psxHwReadGpuSRptr = Config.hacks.gpu_busy
_hack
+ HW_GPU_STATUS = SWAP32(0x1
0
802000);
+ psxHwReadGpuSRptr = Config.hacks.gpu_busy
? psxHwReadGpuSRbusyHack : psxHwReadGpuSR;
}
? psxHwReadGpuSRbusyHack : psxHwReadGpuSR;
}
@@
-62,7
+63,7
@@
void psxHwWriteImask(u32 value)
if (stat & value) {
//if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
// log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
if (stat & value) {
//if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
// log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
-
new_dyna_
set_event(PSXINT_NEWDRC_CHECK, 1);
+ set_event(PSXINT_NEWDRC_CHECK, 1);
}
psxRegs.CP0.n.Cause &= ~0x400;
if (stat & value)
}
psxRegs.CP0.n.Cause &= ~0x400;
if (stat & value)
@@
-84,22
+85,28
@@
void psxHwWriteDmaIcr32(u32 value)
void psxHwWriteGpuSR(u32 value)
{
void psxHwWriteGpuSR(u32 value)
{
+ u32 old_sr = HW_GPU_STATUS, new_sr;
GPU_writeStatus(value);
gpuSyncPluginSR();
GPU_writeStatus(value);
gpuSyncPluginSR();
+ new_sr = HW_GPU_STATUS;
+ // "The Next Tetris" seems to rely on the field order after enable
+ if ((old_sr ^ new_sr) & new_sr & SWAP32(PSXGPU_ILACE))
+ frame_counter |= 1;
}
u32 psxHwReadGpuSR(void)
{
}
u32 psxHwReadGpuSR(void)
{
- u32 v;
+ u32 v
, c = psxRegs.cycle
;
// meh2, syncing for img bit, might want to avoid it..
gpuSyncPluginSR();
// meh2, syncing for img bit, might want to avoid it..
gpuSyncPluginSR();
- v = HW_GPU_STATUS;
+ v = SWAP32(HW_GPU_STATUS);
+ v |= ((s32)(psxRegs.gpuIdleAfter - c) >> 31) & PSXGPU_nBUSY;
// XXX: because of large timeslices can't use hSyncCount, using rough
// approximization instead. Perhaps better use hcounter code here or something.
// XXX: because of large timeslices can't use hSyncCount, using rough
// approximization instead. Perhaps better use hcounter code here or something.
- if (hSyncCount < 240 && (
HW_GPU_STATUS
& PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
- v |= PSXGPU_LCF & (
psxRegs.cycle
<< 20);
+ if (hSyncCount < 240 && (
v
& PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+ v |= PSXGPU_LCF & (
c
<< 20);
return v;
}
return v;
}