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assem_arm.c: Use ARMv6 instructions if possible
[pcsx_rearmed.git]
/
libpcsxcore
/
psxhw.c
diff --git
a/libpcsxcore/psxhw.c
b/libpcsxcore/psxhw.c
index
54e03f6
..
c90f8c7
100644
(file)
--- a/
libpcsxcore/psxhw.c
+++ b/
libpcsxcore/psxhw.c
@@
-24,6
+24,7
@@
#include "psxhw.h"
#include "mdec.h"
#include "cdrom.h"
#include "psxhw.h"
#include "mdec.h"
#include "cdrom.h"
+#include "gpu.h"
//#undef PSXHW_LOG
//#define PSXHW_LOG printf
//#undef PSXHW_LOG
//#define PSXHW_LOG printf
@@
-37,6
+38,7
@@
void psxHwReset() {
mdecInit(); // initialize mdec decoder
cdrReset();
psxRcntInit();
mdecInit(); // initialize mdec decoder
cdrReset();
psxRcntInit();
+ HW_GPU_STATUS = 0x14802000;
}
u8 psxHwRead8(u32 add) {
}
u8 psxHwRead8(u32 add) {
@@
-238,7
+240,10
@@
u32 psxHwRead32(u32 add) {
#endif
return hard;
case 0x1f801814:
#endif
return hard;
case 0x1f801814:
- hard = GPU_readStatus();
+ gpuSyncPluginSR();
+ hard = HW_GPU_STATUS;
+ if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+ hard |= PSXGPU_LCF & (psxRegs.cycle << 20);
#ifdef PSXHW_LOG
PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
#endif
#ifdef PSXHW_LOG
PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
#endif
@@
-426,7
+431,7
@@
void psxHwWrite16(u32 add, u16 value) {
#endif
if (Config.Sio) psxHu16ref(0x1070) |= SWAPu16(0x80);
if (Config.SpuIrq) psxHu16ref(0x1070) |= SWAPu16(0x200);
#endif
if (Config.Sio) psxHu16ref(0x1070) |= SWAPu16(0x80);
if (Config.SpuIrq) psxHu16ref(0x1070) |= SWAPu16(0x200);
- psxHu16ref(0x1070) &= SWAPu16(
(psxHu16(0x1074) & value)
);
+ psxHu16ref(0x1070) &= SWAPu16(
value
);
return;
case 0x1f801074:
return;
case 0x1f801074:
@@
-488,7
+493,7
@@
void psxHwWrite16(u32 add, u16 value) {
default:
if (add>=0x1f801c00 && add<0x1f801e00) {
default:
if (add>=0x1f801c00 && add<0x1f801e00) {
-
SPU_writeRegister(add, valu
e);
+
SPU_writeRegister(add, value, psxRegs.cycl
e);
return;
}
return;
}
@@
-541,7
+546,7
@@
void psxHwWrite32(u32 add, u32 value) {
#endif
if (Config.Sio) psxHu32ref(0x1070) |= SWAPu32(0x80);
if (Config.SpuIrq) psxHu32ref(0x1070) |= SWAPu32(0x200);
#endif
if (Config.Sio) psxHu32ref(0x1070) |= SWAPu32(0x80);
if (Config.SpuIrq) psxHu32ref(0x1070) |= SWAPu32(0x200);
- psxHu32ref(0x1070) &= SWAPu32(
(psxHu32(0x1074) & value)
);
+ psxHu32ref(0x1070) &= SWAPu32(
value
);
return;
case 0x1f801074:
#ifdef PSXHW_LOG
return;
case 0x1f801074:
#ifdef PSXHW_LOG
@@
-682,7
+687,9
@@
void psxHwWrite32(u32 add, u32 value) {
#ifdef PSXHW_LOG
PSXHW_LOG("GPU STATUS 32bit write %x\n", value);
#endif
#ifdef PSXHW_LOG
PSXHW_LOG("GPU STATUS 32bit write %x\n", value);
#endif
- GPU_writeStatus(value); return;
+ GPU_writeStatus(value);
+ gpuSyncPluginSR();
+ return;
case 0x1f801820:
mdecWrite0(value); break;
case 0x1f801820:
mdecWrite0(value); break;
@@
-740,8
+747,8
@@
void psxHwWrite32(u32 add, u32 value) {
default:
// Dukes of Hazard 2 - car engine noise
if (add>=0x1f801c00 && add<0x1f801e00) {
default:
// Dukes of Hazard 2 - car engine noise
if (add>=0x1f801c00 && add<0x1f801e00) {
- SPU_writeRegister(add, value&0xffff);
- SPU_writeRegister(add + 2, value>>16);
+ SPU_writeRegister(add, value&0xffff
, psxRegs.cycle
);
+ SPU_writeRegister(add + 2, value>>16
, psxRegs.cycle
);
return;
}
return;
}
@@
-757,6
+764,6
@@
void psxHwWrite32(u32 add, u32 value) {
#endif
}
#endif
}
-int psxHwFreeze(
gzFile
f, int Mode) {
+int psxHwFreeze(
void *
f, int Mode) {
return 0;
}
return 0;
}