+ if (PicoAHW & PAHW_32X) {
+ Pico32x.sh2irqs |= P32XI_VRES;
+ p32x_update_irls(0);
+ p32x_poll_event(3, 0);
+ }
+}
+
+static void p32x_start_blank(void)
+{
+ if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
+ int offs, lines;
+
+ pprof_start(draw);
+
+ offs = 8; lines = 224;
+ if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
+ offs = 0;
+ lines = 240;
+ }
+
+ // XXX: no proper handling of 32col mode..
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
+ (Pico.video.reg[12] & 1) && // 40col mode
+ (PicoDrawMask & PDRAW_32X_ON))
+ {
+ int md_bg = Pico.video.reg[7] & 0x3f;
+
+ // we draw full layer (not line-by-line)
+ PicoDraw32xLayer(offs, lines, md_bg);
+ }
+ else if (Pico32xDrawMode != PDM32X_32X_ONLY)
+ PicoDraw32xLayerMdOnly(offs, lines);
+
+ pprof_end(draw);
+ }
+
+ // enter vblank
+ Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
+
+ // FB swap waits until vblank
+ if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
+ Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
+ Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
+ }
+
+ Pico32x.sh2irqs |= P32XI_VINT;
+ p32x_update_irls(0);
+ p32x_poll_event(3, 1);
+}
+
+#define sync_sh2s_normal p32x_sync_sh2s
+//#define sync_sh2s_lockstep p32x_sync_sh2s
+
+void sync_sh2s_normal(unsigned int m68k_target)
+{
+ unsigned int target = m68k_target;
+ int msh2_cycles, ssh2_cycles;
+ int done;
+
+ elprintf(EL_32X, "sh2 sync to %u (%u)", m68k_target, SekCycleCnt);
+
+ if (!(Pico32x.regs[0] & P32XS_nRES))
+ return; // rare
+
+ {
+ msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
+ ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
+
+ while (msh2_cycles > 0 || ssh2_cycles > 0) {
+ elprintf(EL_32X, "sh2 exec %u,%u->%u",
+ msh2.m68krcycles_done, ssh2.m68krcycles_done, target);
+
+ if (Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL)) {
+ ssh2.m68krcycles_done = target;
+ ssh2_cycles = 0;
+ }
+ else if (ssh2_cycles > 0) {
+ done = sh2_execute(&ssh2, ssh2_cycles);
+ ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
+
+ ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
+ }
+
+ if (Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL)) {
+ msh2.m68krcycles_done = target;
+ msh2_cycles = 0;
+ }
+ else if (msh2_cycles > 0) {
+ done = sh2_execute(&msh2, msh2_cycles);
+ msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
+
+ msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
+ }
+ }
+ }
+}
+
+#define STEP_68K 24
+
+void sync_sh2s_lockstep(unsigned int m68k_target)
+{
+ unsigned int mcycles;
+
+ mcycles = msh2.m68krcycles_done;
+ if (ssh2.m68krcycles_done < mcycles)
+ mcycles = ssh2.m68krcycles_done;
+
+ while (mcycles < m68k_target) {
+ mcycles += STEP_68K;
+ sync_sh2s_normal(mcycles);
+ }
+}
+
+#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
+ SekRunM68k(m68k_cycles); \
+ if (SekIsStoppedM68k()) \
+ p32x_sync_sh2s(SekCycleCntT + SekCycleCnt); \
+} while (0)
+
+#define PICO_32X
+#include "../pico_cmn.c"
+
+void PicoFrame32x(void)
+{
+ pwm_frame_smp_cnt = 0;
+
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
+
+ p32x_poll_event(3, 1);
+
+ PicoFrameStart();
+ PicoFrameHints();
+ elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
+}
+
+// calculate multipliers against 68k clock (7670442)
+// normally * 3, but effectively slower due to high latencies everywhere
+// however using something lower breaks MK2 animations
+void Pico32xSetClocks(int msh2_hz, int ssh2_hz)
+{
+ float m68k_clk = (float)(OSC_NTSC / 7);
+ if (msh2_hz > 0) {
+ msh2.mult_m68k_to_sh2 = (int)((float)msh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
+ msh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)msh2_hz);
+ }
+ if (ssh2_hz > 0) {
+ ssh2.mult_m68k_to_sh2 = (int)((float)ssh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
+ ssh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)ssh2_hz);
+ }