+ extern int p32x_csum_faked;
+ p32x_csum_faked = 0; // tmp
+}
+
+static void p32x_start_blank(void)
+{
+ // enter vblank
+ Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
+
+ // FB swap waits until vblank
+ if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
+ Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
+ Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
+ }
+
+ Pico32x.sh2irqs |= P32XI_VINT;
+ p32x_update_irls();
+ p32x_poll_event(1);
+}
+
+// FIXME..
+static __inline void SekRunM68k(int cyc)
+{
+ int cyc_do;
+ SekCycleAim += cyc;
+ if (Pico32x.emu_flags & P32XF_68KPOLL) {
+ SekCycleCnt = SekCycleAim;
+ return;
+ }
+ if ((cyc_do = SekCycleAim - SekCycleCnt) <= 0)
+ return;
+#if defined(EMU_CORE_DEBUG)
+ // this means we do run-compare
+ SekCycleCnt+=CM_compareRun(cyc_do, 0);
+#elif defined(EMU_C68K)
+ PicoCpuCM68k.cycles=cyc_do;
+ CycloneRun(&PicoCpuCM68k);
+ SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
+#elif defined(EMU_M68K)
+ SekCycleCnt+=m68k_execute(cyc_do);
+#elif defined(EMU_F68K)
+ SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);
+#endif
+}
+
+// ~1463.8, but due to cache misses and slow mem
+// it's much lower than that
+#define SH2_LINE_CYCLES 735
+
+#define PICO_32X
+#define RUN_SH2S \
+ if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+ sh2_execute(&msh2, SH2_LINE_CYCLES); \
+ if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+ sh2_execute(&ssh2, SH2_LINE_CYCLES);
+
+#include "../pico_cmn.c"
+
+void PicoFrame32x(void)
+{
+ pwm_frame_smp_cnt = 0;
+
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
+
+ p32x_poll_event(1);
+
+ PicoFrameStart();
+ PicoFrameHints();