+ sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, done);
+ sh2->state &= ~SH2_STATE_RUN;
+ pevt_log_sh2_o(sh2, EVT_RUN_END);
+ elprintf_sh2(sh2, EL_32X, "-run %u %d",
+ sh2->m68krcycles_done, done);
+}
+
+// sync other sh2 to this one
+// note: recursive call
+void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target)
+{
+ SH2 *osh2 = sh2->other_sh2;
+ int left_to_event;
+ int m68k_cycles;
+
+ if (osh2->state & SH2_STATE_RUN)
+ return;
+
+ m68k_cycles = m68k_target - osh2->m68krcycles_done;
+ if (m68k_cycles < 200)
+ return;
+
+ if (osh2->state & SH2_IDLE_STATES) {
+ osh2->m68krcycles_done = m68k_target;
+ return;
+ }
+
+ elprintf_sh2(osh2, EL_32X, "sync to %u %d",
+ m68k_target, m68k_cycles);
+
+ run_sh2(osh2, m68k_cycles);
+
+ // there might be new event to schedule current sh2 to
+ if (event_time_next) {
+ left_to_event = event_time_next - m68k_target;
+ left_to_event *= 3;
+ if (sh2_cycles_left(sh2) > left_to_event) {
+ if (left_to_event < 1)
+ left_to_event = 1;
+ sh2_end_run(sh2, left_to_event);
+ }
+ }
+}
+
+#define STEP_LS 24
+#define STEP_N 440
+
+#define sync_sh2s_normal p32x_sync_sh2s
+//#define sync_sh2s_lockstep p32x_sync_sh2s
+
+/* most timing is in 68k clock */
+void sync_sh2s_normal(unsigned int m68k_target)
+{
+ unsigned int now, target, timer_cycles;
+ int cycles;
+
+ elprintf(EL_32X, "sh2 sync to %u", m68k_target);
+
+ if (!(Pico32x.regs[0] & P32XS_nRES)) {
+ msh2.m68krcycles_done = ssh2.m68krcycles_done = m68k_target;
+ return; // rare
+ }
+
+ now = msh2.m68krcycles_done;
+ if (CYCLES_GT(now, ssh2.m68krcycles_done))
+ now = ssh2.m68krcycles_done;
+ timer_cycles = now;
+
+ while (CYCLES_GT(m68k_target, now))
+ {
+ if (event_time_next && CYCLES_GE(now, event_time_next))
+ p32x_run_events(now);
+
+ target = m68k_target;
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+ if (CYCLES_GT(target, now + STEP_N))
+ target = now + STEP_N;
+
+ while (CYCLES_GT(target, now))
+ {
+ elprintf(EL_32X, "sh2 exec to %u %d,%d/%d, flags %x", target,
+ target - msh2.m68krcycles_done, target - ssh2.m68krcycles_done,
+ m68k_target - now, Pico32x.emu_flags);
+
+ if (!(ssh2.state & SH2_IDLE_STATES)) {
+ cycles = target - ssh2.m68krcycles_done;
+ if (cycles > 0) {
+ run_sh2(&ssh2, cycles);
+
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+ }
+ }
+
+ if (!(msh2.state & SH2_IDLE_STATES)) {
+ cycles = target - msh2.m68krcycles_done;
+ if (cycles > 0) {
+ run_sh2(&msh2, cycles);
+
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+ }
+ }
+
+ now = target;
+ if (!(msh2.state & SH2_IDLE_STATES)) {
+ if (CYCLES_GT(now, msh2.m68krcycles_done))
+ now = msh2.m68krcycles_done;
+ }
+ if (!(ssh2.state & SH2_IDLE_STATES)) {
+ if (CYCLES_GT(now, ssh2.m68krcycles_done))
+ now = ssh2.m68krcycles_done;
+ }
+ }
+
+ p32x_timers_do(now - timer_cycles);
+ timer_cycles = now;
+ }
+
+ // advance idle CPUs
+ if (msh2.state & SH2_IDLE_STATES) {
+ if (CYCLES_GT(m68k_target, msh2.m68krcycles_done))
+ msh2.m68krcycles_done = m68k_target;
+ }
+ if (ssh2.state & SH2_IDLE_STATES) {
+ if (CYCLES_GT(m68k_target, ssh2.m68krcycles_done))
+ ssh2.m68krcycles_done = m68k_target;
+ }
+
+ // everyone is in sync now
+ Pico32x.comm_dirty = 0;
+}
+
+void sync_sh2s_lockstep(unsigned int m68k_target)
+{
+ unsigned int mcycles;
+
+ mcycles = msh2.m68krcycles_done;
+ if (ssh2.m68krcycles_done < mcycles)
+ mcycles = ssh2.m68krcycles_done;
+
+ while (mcycles < m68k_target) {
+ mcycles += STEP_LS;
+ sync_sh2s_normal(mcycles);
+ }
+}
+
+#define CPUS_RUN(m68k_cycles) do { \
+ if (PicoIn.AHW & PAHW_MCD) \
+ pcd_run_cpus(m68k_cycles); \
+ else \
+ SekRunM68k(m68k_cycles); \
+ \
+ if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \
+ && !Pico.m.z80_reset && (PicoIn.opt & POPT_EN_Z80)) \
+ PicoSyncZ80(SekCyclesDone()); \
+ if (Pico32x.emu_flags & (P32XF_68KCPOLL|P32XF_68KVPOLL)) \
+ p32x_sync_sh2s(SekCyclesDone()); \
+} while (0)
+
+#define PICO_32X
+#define PICO_CD