+ if (PicoAHW & PAHW_32X) {
+ Pico32x.sh2irqs |= P32XI_VRES;
+ p32x_update_irls();
+ p32x_poll_event(3, 0);
+ }
+}
+
+static void p32x_start_blank(void)
+{
+ if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
+ int offs, lines;
+
+ pprof_start(draw);
+
+ offs = 8; lines = 224;
+ if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
+ offs = 0;
+ lines = 240;
+ }
+
+ // XXX: no proper handling of 32col mode..
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
+ (Pico.video.reg[12] & 1) && // 40col mode
+ (PicoDrawMask & PDRAW_32X_ON))
+ {
+ int md_bg = Pico.video.reg[7] & 0x3f;
+
+ // we draw full layer (not line-by-line)
+ PicoDraw32xLayer(offs, lines, md_bg);
+ }
+ else if (Pico32xDrawMode != PDM32X_32X_ONLY)
+ PicoDraw32xLayerMdOnly(offs, lines);
+
+ pprof_end(draw);
+ }
+
+ // enter vblank
+ Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
+
+ // FB swap waits until vblank
+ if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
+ Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
+ Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
+ }
+
+ Pico32x.sh2irqs |= P32XI_VINT;
+ p32x_update_irls();
+ p32x_poll_event(3, 1);
+}
+
+static __inline void run_m68k(int cyc)
+{
+ pprof_start(m68k);
+
+#if defined(EMU_C68K)
+ PicoCpuCM68k.cycles = cyc;
+ CycloneRun(&PicoCpuCM68k);
+ SekCycleCnt += cyc - PicoCpuCM68k.cycles;
+#elif defined(EMU_M68K)
+ SekCycleCnt += m68k_execute(cyc);
+#elif defined(EMU_F68K)
+ SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
+#endif
+
+ pprof_end(m68k);
+}
+
+// ~1463.8, but due to cache misses and slow mem
+// it's much lower than that
+//#define SH2_LINE_CYCLES 735
+#define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
+
+#define PICO_32X
+#define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
+{ \
+ int slice; \
+ SekCycleAim += m68k_cycles; \
+ while (SekCycleCnt < SekCycleAim) { \
+ slice = SekCycleCnt; \
+ run_m68k(SekCycleAim - SekCycleCnt); \
+ if (!(Pico32x.regs[0] & P32XS_nRES)) \
+ continue; /* SH2s reseting */ \
+ slice = SekCycleCnt - slice; /* real count from 68k */ \
+ if (SekCycleCnt < SekCycleAim) \
+ elprintf(EL_32X, "slice %d", slice); \
+ if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) { \
+ pprof_start(ssh2); \
+ sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
+ pprof_end(ssh2); \
+ } \
+ if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) { \
+ pprof_start(msh2); \
+ sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
+ pprof_end(msh2); \
+ } \
+ pprof_start(dummy); \
+ pprof_end(dummy); \
+ } \
+}
+
+#define STEP_68K 24
+#define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
+{ \
+ int i; \
+ for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
+ run_m68k(STEP_68K); \
+ if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+ sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
+ if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+ sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
+ } \
+ /* last step */ \
+ i = (m68k_cycles) - i; \
+ run_m68k(i); \
+ if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+ sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
+ if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+ sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
+}
+
+#define CPUS_RUN CPUS_RUN_SIMPLE
+//#define CPUS_RUN CPUS_RUN_LOCKSTEP
+
+#include "../pico_cmn.c"
+
+void PicoFrame32x(void)
+{
+ pwm_frame_smp_cnt = 0;
+
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
+
+ p32x_poll_event(3, 1);
+
+ PicoFrameStart();
+ PicoFrameHints();
+ elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);