+ switch (a) {
+ case 0: // FM
+ Pico32x.regs[0] &= ~P32XS_FM;
+ Pico32x.regs[0] |= (d << 8) & P32XS_FM;
+ return;
+ case 1: //
+ Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
+ Pico32x.sh2_regs[0] &= ~0x80;
+ Pico32x.sh2_regs[0] |= d & 0x80;
+ p32x_update_irls();
+ return;
+ case 5: // H count
+ Pico32x.sh2_regs[4 / 2] = d & 0xff;
+ return;
+ }
+
+ if ((a & 0x30) == 0x20) {
+ u8 *r8 = (u8 *)Pico32x.regs;
+ r8[a ^ 1] = d;
+ p32x_poll_undetect(&m68k_poll, 0);
+ p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
+ return;