-m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
- tst r0, #2
- bne m_m68k_read32_wordram1_1M_b0_unal
- cell_map
- ldr r1, =(Pico+0x22200)
- add r0, r0, #0x0c0000
- ldr r1, [r1]
- bic r0, r0, #1
- m_read32_gen
- bx lr
-m_m68k_read32_wordram1_1M_b0_unal:
- @ hopefully this doesn't happen too often
- mov r12,lr
- mov r3, r0
- bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
- add r1, r3, #2
- mov r3, r0
- mov r0, r1
- bl m_m68k_read16_wordram1_1M_b0
- orr r0, r0, r3, lsl #16
- bx r12
-
-
-m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
- tst r0, #2
- bne m_m68k_read32_wordram1_1M_b1_unal
- cell_map
- ldr r1, =(Pico+0x22200)
- add r0, r0, #0x0e0000
- ldr r1, [r1]
- bic r0, r0, #1
- m_read32_gen
- bx lr
-m_m68k_read32_wordram1_1M_b1_unal:
- mov r12,lr
- mov r3, r0
- bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
- add r1, r3, #2
- mov r3, r0
- mov r0, r1
- bl m_m68k_read16_wordram1_1M_b1
- orr r0, r0, r3, lsl #16
- bx r12
-
-
-m_m68k_read32_bcram_size: @ 0x400000
- cmp r0, #0x400000
- ldreq r1, =SRam
- mov r0, #0
- ldreq r1, [r1]
- bxne lr
- tst r1, r1
- movne r0, #0x30000 @ pretend to be a 64k cart
- bx lr
-
-
-m_m68k_read32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
- mov r12,lr
- add r3, r0, #2
- bl m_m68k_read8_bcram
- mov r1, r0
- mov r0, r3
- mov r3, r1
- bl m_m68k_read8_bcram
- orr r0, r0, r3, lsl #16
- bx r12
-
-
-m_m68k_read32_bcram_reg: @ 0x7fffff
- bcram_reg_rw 1, 0x7ffffc
-
-
-@ it is not very practical to use long access on hw registers, so I assume it is not used too much.
-m_m68k_read32_system_io:
- bic r1, r0, #0xfe0000
- bic r1, r1, #0x3f
- cmp r1, #0x012000
- bne m_m68k_read32_misc
- and r1, r0, #0x3e
- cmp r1, #0x0e
- blt m_m68k_read32_misc
- cmp r1, #0x30
- movge r0, #0
- bxge lr
- @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
- mov r0, r1
- ldr r1, =(Pico+0x22200)
- mov r2, #0xff
- ldr r1, [r1]
- orr r2, r2, r2, lsl #16
- add r1, r1, #0x110000
- m_read32_gen
- and r1, r2, r0 @ data is big-endian read as little, have to byteswap
- and r0, r2, r0, lsr #8
- orr r0, r0, r1, lsl #8
- bx lr
-
-m_m68k_read32_misc:
- add r1, r0, #2
- stmfd sp!,{r1,lr}
- bl m_m68k_read16_system_io
- swp r0, r0, [sp]
- bl m_m68k_read16_system_io
- ldmfd sp!,{r1,lr}
- orr r0, r0, r1, lsl #16
- bx lr
-
-
-m_m68k_read32_vdp:
- tst r0, #0x70000
- tsteq r0, #0x000e0
- bxne lr @ invalid read
- bic r0, r0, #1
- add r1, r0, #2
- stmfd sp!,{r1,lr}
- bl PicoVideoRead
- swp r0, r0, [sp]
- bl PicoVideoRead
- ldmfd sp!,{r1,lr}
- orr r0, r0, r1, lsl #16
- bx lr
-
-
-m_m68k_read32_ram:
- ldr r1, =Pico
- bic r0, r0, #0xff0000
- bic r0, r0, #1
- m_read32_gen
- bx lr
-
-.pool
-
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-
-
-m_write_null:
-m_m68k_write8_bios:
-m_m68k_write8_bcram_size: @ 0x400000
- bx lr
-
-
-m_m68k_write8_prgbank:
- ldr r2, =(Pico+0x22200)
- eor r0, r0, #1
- ldr r2, [r2]
- mov r12,#0x110000
- orr r3, r12, #0x002200
- ldr r3, [r2, r3]
- ldr r12,[r2, r12]
- and r3, r3, #0x00030000
- cmp r3, #0x00010000 @ have bus or in reset state?
- bxeq lr
- and r12,r12,#0xc0000000 @ r3 & 0xC0
- add r2, r2, r12, lsr #12
- strb r1, [r2, r0]
- bx lr
-
-
-m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
-m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
- ldr r2, [r2]
- eor r0, r0, #1
- strb r1, [r2, r0]
- bx lr
-
-
-m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
- ldr r2, [r2]
- eor r0, r0, #1
- strb r1, [r2, r0]
- bx lr
-
-
-m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
- ldr r2, [r2]
- eor r0, r0, #1
- strb r1, [r2, r0]
- bx lr
-
-
-m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
- mov r3, r1
- cell_map
- ldr r2, =(Pico+0x22200)
- add r0, r0, #0x0c0000
- ldr r2, [r2]
- eor r0, r0, #1
- strb r3, [r2, r0]
- bx lr
-
-
-m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
- mov r3, r1
- cell_map
- ldr r2, =(Pico+0x22200)
- add r0, r0, #0x0e0000
- ldr r2, [r2]
- eor r0, r0, #1
- strb r3, [r2, r0]
- bx lr
-
-
-m_m68k_write8_bcram: @ 0x600000 - 0x61ffff
- @ can't use r3 or r12, because of write32
- ldr r2, =SRam
- bic r0, r0, #0xfe0000
- ldr r2, [r2]
- tst r2, r2
- bxeq lr
- add r0, r2, r0, lsr #1
- ldr r2, =(Pico+0x22200)
- ldr r2, [r2]
- add r0, r0, #0x2000
- add r2, r2, #0x110000
- add r2, r2, #0x002200
- ldr r2, [r2, #0x18]
- tst r2, #1 @ check bcram reg
- bxeq lr
- strb r1, [r0]
- ldr r2, =SRam
- mov r0, #1
- strb r0, [r2, #0x0e] @ SRam.changed = 1
- bx lr
-
-
-m_m68k_write8_bcram_reg: @ 0x7fffff
- bcram_reg_rw 0, 0x7fffff
-
-
-m_m68k_write8_system_io:
- bic r2, r0, #0xfe0000
- bic r2, r2, #0x3f
- cmp r2, #0x012000
- beq m68k_reg_write8
- mov r2, #8
-@ b OtherWrite8
- b m_m68k_write8_misc
-
-
-m_m68k_write8_vdp:
- tst r0, #0x70000
- tsteq r0, #0x000e0
- bxne lr @ invalid
- and r2, r0, #0x19
- cmp r2, #0x11
- andeq r0, r1, #0xff
- beq SN76496Write
- and r1, r1, #0xff
- orr r1, r1, r1, lsl #8 @ byte access gets mirrored
- b PicoVideoWrite
-
-
-m_m68k_write8_ram:
- ldr r2, =Pico
- bic r0, r0, #0xff0000
- eor r0, r0, #1
- strb r1, [r2, r0]
- bx lr
-
-
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-
-
-m_m68k_write16_bios:
-m_m68k_write16_bcram_size: @ 0x400000
- bx lr
-
-
-m_m68k_write16_prgbank:
- ldr r2, =(Pico+0x22200)
- bic r0, r0, #1
- ldr r2, [r2]
- mov r12,#0x110000
- orr r3, r12, #0x002200
- ldr r3, [r2, r3]
- ldr r12,[r2, r12]
- and r3, r3, #0x00030000
- cmp r3, #0x00010000 @ have bus or in reset state?
- bxeq lr
- and r12,r12,#0xc0000000 @ r3 & 0xC0
- add r2, r2, r12, lsr #12
- strh r1, [r2, r0]
- bx lr
-
-
-m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
-m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
- ldr r2, [r2]
- bic r0, r0, #1
- strh r1, [r2, r0]
- bx lr
-
-
-m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
- ldr r2, [r2]
- bic r0, r0, #1
- strh r1, [r2, r0]
- bx lr
-
-
-m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
- ldr r2, [r2]
- bic r0, r0, #1
- strh r1, [r2, r0]
- bx lr
-
-
-m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
- @ Warning: write32 relies on NOT using r12 and and keeping data in r3
- mov r3, r1
- cell_map
- ldr r1, =(Pico+0x22200)
- add r0, r0, #0x0c0000
- ldr r1, [r1]
- bic r0, r0, #1
- strh r3, [r1, r0]
- bx lr
-
-
-m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
- mov r3, r1
- cell_map
- ldr r1, =(Pico+0x22200)
- add r0, r0, #0x0e0000
- ldr r1, [r1]
- bic r0, r0, #1
- strh r3, [r1, r0]
- bx lr
-
-
-@ m_m68k_write16_bcram: @ 0x600000 - 0x61ffff
-.equiv m_m68k_write16_bcram, m_m68k_write8_bcram
-
-
-m_m68k_write16_bcram_reg: @ 0x7fffff
- bcram_reg_rw 0, 0x7ffffe
-
-
-m_m68k_write16_system_io:
- bic r0, r0, #1
- bic r2, r0, #0xfe0000
- bic r2, r2, #0x3f
- cmp r2, #0x012000
- bne OtherWrite16
-
-m_m68k_write16_regs:
- and r0, r0, #0x3e
- cmp r0, #0x0e
- beq m_m68k_write16_regs_spec
- and r3, r1, #0xff
- add r2, r0, #1
- stmfd sp!,{r2,r3,lr}
- mov r1, r1, lsr #8
- bl m68k_reg_write8
- ldmfd sp!,{r0,r1,lr}
- b m68k_reg_write8
-
-m_m68k_write16_regs_spec: @ special case
- ldr r2, =(Pico+0x22200)
- ldr r3, =s68k_poll_adclk
- mov r0, #0x110000
- ldr r2, [r2]
- add r0, r0, #0x00000e
- mov r1, r1, lsr #8
- strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
- ldr r2, [r3]
- mov r1, #0
- and r2, r2, #0xfe
- cmp r2, #0x0e
- bxne lr
- ldr r0, =PicoCpuCS68k
- str r1, [r0, #0x58] @ push s68k out of stopped state
- str r1, [r3]
- bx lr
-
-
-m_m68k_write16_vdp:
- tst r0, #0x70000
- tsteq r0, #0x000e0
- bxne lr @ invalid
- bic r0, r0, #1
- and r2, r0, #0x18
- cmp r2, #0x10
- bne PicoVideoWrite
- and r0, r1, #0xff
- b SN76496Write @ lsb goes to 0x11
-
-
-m_m68k_write16_ram:
- ldr r2, =Pico
- bic r0, r0, #0xff0000
- bic r0, r0, #1
- strh r1, [r2, r0]
- bx lr
-
-
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-
-
-m_m68k_write32_bios:
-m_m68k_write32_bcram_size: @ 0x400000
- bx lr
-
-
-m_m68k_write32_prgbank:
- ldr r2, =(Pico+0x22200)
- bic r0, r0, #1
- ldr r2, [r2]
- mov r12,#0x110000
- orr r3, r12, #0x002200
- ldr r3, [r2, r3]
- ldr r12,[r2, r12]
- and r3, r3, #0x00030000
- cmp r3, #0x00010000 @ have bus or in reset state?
- bxeq lr
- and r12,r12,#0xc0000000 @ r3 & 0xC0
- add r2, r2, r12, lsr #12
- m_write32_gen
- bx lr
-
-
-m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
-m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
- ldr r2, [r2]
- bic r0, r0, #1
- m_write32_gen
- bx lr
-
-
-m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
- ldr r2, [r2]
- bic r0, r0, #1
- m_write32_gen
- bx lr
-
-
-m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
- ldr r2, =(Pico+0x22200)
- sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
- ldr r2, [r2]
- bic r0, r0, #1
- m_write32_gen
- bx lr
-
-
-m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
- tst r0, #2
- bne m_m68k_write32_wordram1_1M_b0_unal
- mov r3, r1
- cell_map
- ldr r2, =(Pico+0x22200)
- add r0, r0, #0x0c0000
- ldr r2, [r2]
- bic r0, r0, #1
- mov r1, r3
- m_write32_gen
- bx lr
-m_m68k_write32_wordram1_1M_b0_unal:
- @ hopefully this doesn't happen too often
- add r12,r0, #2
- mov r1, r1, ror #16
- stmfd sp!,{lr}
- bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
- ldmfd sp!,{lr}
- mov r0, r12
- mov r1, r3, lsr #16
- b m_m68k_write16_wordram1_1M_b0
-
-
-m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
- tst r0, #2
- bne m_m68k_write32_wordram1_1M_b1_unal
- mov r3, r1
- cell_map
- ldr r2, =(Pico+0x22200)
- add r0, r0, #0x0e0000
- ldr r2, [r2]
- bic r0, r0, #1
- mov r1, r3
- m_write32_gen
- bx lr
-m_m68k_write32_wordram1_1M_b1_unal:
- add r12,r0, #2
- mov r1, r1, ror #16
- stmfd sp!,{lr}
- bl m_m68k_write16_wordram1_1M_b1 @ same as above
- ldmfd sp!,{lr}
- mov r0, r12
- mov r1, r3, lsr #16
- b m_m68k_write16_wordram1_1M_b1
-
-
-m_m68k_write32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
- mov r12,lr
- add r3, r0, #2
- mov r1, r1, ror #16
- bl m_m68k_write8_bcram
- mov r0, r3
- mov r1, r1, ror #16
- bl m_m68k_write8_bcram
- bx r12
-
-
-m_m68k_write32_bcram_reg: @ 0x7fffff
- bcram_reg_rw 0, 0x7ffffc
-
-
-
-@ it is not very practical to use long access on hw registers, so I assume it is not used too much.
-m_m68k_write32_system_io:
- bic r2, r0, #0xfe0000
- bic r2, r2, #0x3f
- cmp r2, #0x012000
- bne m_m68k_write32_misc
- and r2, r0, #0x3e
- cmp r2, #0x20
- bxge lr
- cmp r2, #0x10
- bge m_m68k_write32_regs_comm
- cmp r2, #0x0c
- bge m_m68k_write32_regs_spec @ hits the nasty comm reg qiurk
-
- bic r0, r0, #1
- stmfd sp!,{r0,r1,lr}
- mov r1, r1, lsr #24
- bl m68k_reg_write8
- ldr r0, [sp]
- ldr r1, [sp, #4]
- add r0, r0, #1
- mov r1, r1, lsr #16
- bl m68k_reg_write8
- ldr r0, [sp]
- ldr r1, [sp, #4]
- add r0, r0, #2
- mov r1, r1, lsr #8
- bl m68k_reg_write8
- ldmfd sp!,{r0,r1,lr}
- add r0, r0, #3
- b m68k_reg_write8
-
-m_m68k_write32_regs_comm: @ Handle the 0x10-0x1f range
- ldr r0, =(Pico+0x22200)
- mov r3, #0xff
- ldr r0, [r0]
- orr r3, r3, r3, lsl #16
- add r0, r0, #0x110000
- and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
- and r1, r3, r1, ror #24
- orr r1, r1, r12,lsl #8 @ end of byteswap
- cmp r2, #0x1e
- strh r1, [r2, r0]!
- ldr r3, =s68k_poll_adclk
- ldr r0, [r3]
- movne r1, r1, lsr #16
- strneh r1, [r2, #2]
- cmp r0, #0x10
- bxlt lr
- ldr r0, =PicoCpuCS68k @ remove poll detected state for s68k
- mov r1, #0
- str r1, [r0, #0x58]
- str r1, [r3]
- bx lr
-
-m_m68k_write32_misc:
- bic r0, r0, #1
- stmfd sp!,{r0,r1,lr}
- mov r1, r1, lsr #16
- bl OtherWrite16
- ldmfd sp!,{r0,r1,lr}
- add r0, r0, #2
- b OtherWrite16
-
-m_m68k_write32_regs_spec:
- bic r0, r0, #1
- stmfd sp!,{r0,r1,lr}
- mov r1, r1, lsr #16
- bl m_m68k_write16_regs
- ldmfd sp!,{r0,r1,lr}
- add r0, r0, #2
- b m_m68k_write16_regs
-
-
-m_m68k_write32_vdp:
- tst r0, #0x70000
- tsteq r0, #0x000e0
- bxne lr @ invalid
- and r2, r0, #0x18
- cmp r2, #0x10
- moveq r0, r1, lsr #16
- beq SN76496Write @ which game is crazy enough to do that?
- stmfd sp!,{r0,r1,lr}
- mov r1, r1, lsr #16
- bl PicoVideoWrite
- ldmfd sp!,{r0,r1,lr}
- add r0, r0, #2
- b PicoVideoWrite
-
-
-m_m68k_write32_ram:
- ldr r2, =Pico
- bic r0, r0, #0xff0000
- bic r0, r0, #1
- m_write32_gen
- bx lr
-
-.pool
-
-
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-
-
-.macro m_s68k_read8_ram map_addr
- ldr r1, =(Pico+0x22200)
- eor r0, r0, #1
- ldr r1, [r1]
-.if \map_addr
- add r0, r0, #\map_addr @ map to our address
-.endif
- ldrb r0, [r1, r0]
- bx lr
-.endm
-
-.macro m_s68k_read8_wordram_2M_decode map_addr