// draw a frame just after vblank in alternative render mode
// yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
PicoFrameFull();
// draw a frame just after vblank in alternative render mode
// yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
PicoFrameFull();
{
// find the right moment for frame renderer, when display is no longer blanked
if ((pv->reg[1]&0x40) || y > 100) {
{
// find the right moment for frame renderer, when display is no longer blanked
if ((pv->reg[1]&0x40) || y > 100) {
do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE);
do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE);
// the following SekRun is there for several reasons:
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
// the following SekRun is there for several reasons:
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
elprintf(EL_INTS, "vint: @ %06x [%u]", SekPc, SekCyclesDone());
SekInterrupt(6);
}
cycles = SekCyclesDone();
elprintf(EL_INTS, "vint: @ %06x [%u]", SekPc, SekCyclesDone());
SekInterrupt(6);
}
cycles = SekCyclesDone();
do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE);
do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE);