-#ifdef _USE_MZ80\r
- struct mz80context z80;\r
-\r
- // z80\r
- mz80init();\r
- // Modify the default context\r
- mz80GetContext(&z80);\r
-\r
- // point mz80 stuff\r
- z80.z80Base=Pico.zram;\r
- z80.z80MemRead=mz80_mem_read;\r
- z80.z80MemWrite=mz80_mem_write;\r
- z80.z80IoRead=mz80_io_read;\r
- z80.z80IoWrite=mz80_io_write;\r
-\r
- mz80SetContext(&z80);\r
-#endif\r
-#ifdef _USE_DRZ80\r
- memset(&drZ80, 0, sizeof(struct DrZ80));\r
- drZ80.z80_rebasePC=DrZ80_rebasePC;\r
- drZ80.z80_rebaseSP=DrZ80_rebaseSP;\r
- drZ80.z80_read8 =z80_read;\r
- drZ80.z80_read16 =NULL;\r
- drZ80.z80_write8 =z80_write;\r
- drZ80.z80_write16 =NULL;\r
- drZ80.z80_in =z80_in;\r
- drZ80.z80_out =z80_out;\r
- drZ80.z80_irq_callback=NULL;\r
-#endif\r
-#ifdef _USE_CZ80\r
- memset(&CZ80, 0, sizeof(CZ80));\r
- Cz80_Init(&CZ80);\r
- Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
- Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
- Cz80_Set_ReadB(&CZ80, (UINT8 (*)(UINT32 address))z80_read); // unused (hacked in)\r
- Cz80_Set_WriteB(&CZ80, z80_write);\r
- Cz80_Set_INPort(&CZ80, z80_in);\r
- Cz80_Set_OUTPort(&CZ80, z80_out);\r
-#endif\r
-}\r
-\r
-PICO_INTERNAL void z80_reset(void)\r
-{\r
-#ifdef _USE_MZ80\r
- mz80reset();\r
-#endif\r
-#ifdef _USE_DRZ80\r
- memset(&drZ80, 0, 0x54);\r
- drZ80.Z80F = (1<<2); // set ZFlag\r
- drZ80.Z80F2 = (1<<2); // set ZFlag\r
- drZ80.Z80IX = 0xFFFF << 16;\r
- drZ80.Z80IY = 0xFFFF << 16;\r
- drZ80.Z80IM = 0; // 1?\r
- drZ80.z80irqvector = 0xff0000; // RST 38h\r
- drZ80.Z80PC = drZ80.z80_rebasePC(0);\r
- drZ80.Z80SP = drZ80.z80_rebaseSP(0x2000); // 0xf000 ?\r
-#endif\r
-#ifdef _USE_CZ80\r
- Cz80_Reset(&CZ80);\r
- Cz80_Set_Reg(&CZ80, CZ80_IX, 0xffff);\r
- Cz80_Set_Reg(&CZ80, CZ80_IY, 0xffff);\r
- Cz80_Set_Reg(&CZ80, CZ80_SP, 0x2000);\r
-#endif\r
- Pico.m.z80_fakeval = 0; // for faking when Z80 is disabled\r
-}\r
-\r
-#if 0\r
-static int had_irq = 0, z80_ppc, z80_ops_done = 0;\r
-int z80_cycles_left = 0;\r
-\r
-void z80_int(void)\r
-{\r
- had_irq = 1;\r
-}\r
-\r
-static void xfail(void)\r
-{\r
- printf("PC: %04x, %04x\n", Cz80_Get_Reg(&CZ80, CZ80_PC), z80_ppc);\r
- printf("z80_ops_done done: %i\n", z80_ops_done);\r
- exit(1);\r
-}\r
-\r
-int z80_run(int cycles)\r
-{\r
- int fail = 0;\r
- int cdrz, ccz;\r
-\r
- z80_cycles_left = cycles;\r
- z80_ppc = Cz80_Get_Reg(&CZ80, CZ80_PC);\r
-\r
- if (had_irq) {\r
- printf("irq @ %04x\n", Cz80_Get_Reg(&CZ80, CZ80_PC));\r
- Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE);\r
- drZ80.Z80_IRQ = 1;\r
- had_irq = 0;\r
- }\r
-\r
- while (z80_cycles_left > 0)\r
- {\r
- ccz = Cz80_Exec(&CZ80, 1);\r
- cdrz = 1 - DrZ80Run(&drZ80, 1);\r
-\r
- if (drZ80.Z80_IRQ && (drZ80.Z80IF&1))\r
- cdrz += 1 - DrZ80Run(&drZ80, 1); // cz80 processes IRQ after EI, DrZ80 does not\r
-\r
- if (cdrz != ccz) {\r
- printf("cycles: %i vs %i\n", cdrz, ccz);\r
- fail = 1;\r
- }\r
-\r
- if (drZ80.Z80PC - drZ80.Z80PC_BASE != Cz80_Get_Reg(&CZ80, CZ80_PC)) {\r
- printf("PC: %04x vs %04x\n", drZ80.Z80PC - drZ80.Z80PC_BASE, Cz80_Get_Reg(&CZ80, CZ80_PC));\r
- fail = 1;\r
- }\r
-\r
- if (fail) xfail();\r