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gpu_neon: don't crash on large primitives in enhancement mode
[pcsx_rearmed.git]
/
plugins
/
dfsound
/
registers.c
diff --git
a/plugins/dfsound/registers.c
b/plugins/dfsound/registers.c
index
e75f708
..
ae7ed24
100644
(file)
--- a/
plugins/dfsound/registers.c
+++ b/
plugins/dfsound/registers.c
@@
-22,6
+22,7
@@
#include "externals.h"
\r
#include "registers.h"
\r
#include "spu_config.h"
\r
#include "externals.h"
\r
#include "registers.h"
\r
#include "spu_config.h"
\r
+#include "spu.h"
\r
\r
static void SoundOn(int start,int end,unsigned short val);
\r
static void SoundOff(int start,int end,unsigned short val);
\r
\r
static void SoundOn(int start,int end,unsigned short val);
\r
static void SoundOff(int start,int end,unsigned short val);
\r
@@
-36,17
+37,19
@@
static void ReverbOn(int start,int end,unsigned short val);
// WRITE REGISTERS: called by main emu
\r
////////////////////////////////////////////////////////////////////////
\r
\r
// WRITE REGISTERS: called by main emu
\r
////////////////////////////////////////////////////////////////////////
\r
\r
-static const uint32_t ignore_dupe[
8
] = {
\r
+static const uint32_t ignore_dupe[
16
] = {
\r
// ch 0-15 c40 c80 cc0
\r
0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,
\r
// ch 16-24 d40 control reverb
\r
// ch 0-15 c40 c80 cc0
\r
0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,
\r
// ch 16-24 d40 control reverb
\r
- 0x7f7f7f7f, 0x7f7f7f7f, 0xff05ff0f, 0xffffffff
\r
+ 0x7f7f7f7f, 0x7f7f7f7f, 0xff05ff0f, 0xffffffff,
\r
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
\r
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
\r
};
\r
\r
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,
\r
unsigned int cycles)
\r
{
\r
};
\r
\r
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,
\r
unsigned int cycles)
\r
{
\r
- int r = reg & 0xff
f
;
\r
+ int r = reg & 0xff
e
;
\r
int rofs = (r - 0xc00) >> 1;
\r
int changed = spu.regArea[rofs] != val;
\r
spu.regArea[rofs] = val;
\r
int rofs = (r - 0xc00) >> 1;
\r
int changed = spu.regArea[rofs] != val;
\r
spu.regArea[rofs] = val;
\r
@@
-118,6
+121,12
@@
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,
}
\r
return;
\r
}
\r
}
\r
return;
\r
}
\r
+ else if (0x0e00 <= r && r < 0x0e60)
\r
+ {
\r
+ int ch = (r >> 2) & 0x1f;
\r
+ log_unhandled("c%02d w %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', val);
\r
+ spu.s_chan[ch].iVolume[(r >> 1) & 1] = (signed short)val >> 1;
\r
+ }
\r
\r
switch(r)
\r
{
\r
\r
switch(r)
\r
{
\r
@@
-127,7
+136,7
@@
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,
break;
\r
//-------------------------------------------------//
\r
case H_SPUdata:
\r
break;
\r
//-------------------------------------------------//
\r
case H_SPUdata:
\r
- *(unsigned short *)(spu.spuMemC + spu.spuAddr) =
val
;
\r
+ *(unsigned short *)(spu.spuMemC + spu.spuAddr) =
HTOLE16(val)
;
\r
spu.spuAddr += 2;
\r
spu.spuAddr &= 0x7fffe;
\r
break;
\r
spu.spuAddr += 2;
\r
spu.spuAddr &= 0x7fffe;
\r
break;
\r
@@
-149,6
+158,8
@@
void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,
goto rvbd;
\r
//-------------------------------------------------//
\r
case H_SPUirqAddr:
\r
goto rvbd;
\r
//-------------------------------------------------//
\r
case H_SPUirqAddr:
\r
+ //if (val & 1)
\r
+ // log_unhandled("w irq with lsb: %08lx %04x\n", reg, val);
\r
spu.pSpuIrq=spu.spuMemC+(((unsigned long) val<<3)&~0xf);
\r
goto upd_irq;
\r
//-------------------------------------------------//
\r
spu.pSpuIrq=spu.spuMemC+(((unsigned long) val<<3)&~0xf);
\r
goto upd_irq;
\r
//-------------------------------------------------//
\r
@@
-297,7
+308,7
@@
rvbd:
\r
unsigned short CALLBACK SPUreadRegister(unsigned long reg)
\r
{
\r
\r
unsigned short CALLBACK SPUreadRegister(unsigned long reg)
\r
{
\r
- const unsigned long r
=reg&0xfff
;
\r
+ const unsigned long r
= reg & 0xffe
;
\r
\r
if(r>=0x0c00 && r<0x0d80)
\r
{
\r
\r
if(r>=0x0c00 && r<0x0d80)
\r
{
\r
@@
-320,6
+331,13
@@
unsigned short CALLBACK SPUreadRegister(unsigned long reg)
}
\r
}
\r
}
\r
}
\r
}
\r
}
\r
+ else if (0x0e00 <= r && r < 0x0e60)
\r
+ {
\r
+ int ch = (r >> 2) & 0x1f;
\r
+ int v = spu.s_chan[ch].iVolume[(r >> 1) & 1] << 1;
\r
+ log_unhandled("c%02d r %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', v);
\r
+ return v;
\r
+ }
\r
\r
switch(r)
\r
{
\r
\r
switch(r)
\r
{
\r
@@
-334,7
+352,7
@@
unsigned short CALLBACK SPUreadRegister(unsigned long reg)
\r
case H_SPUdata:
\r
{
\r
\r
case H_SPUdata:
\r
{
\r
- unsigned short s =
*(unsigned short *)(spu.spuMemC + spu.spuAddr
);
\r
+ unsigned short s =
LE16TOH(*(unsigned short *)(spu.spuMemC + spu.spuAddr)
);
\r
spu.spuAddr += 2;
\r
spu.spuAddr &= 0x7fffe;
\r
return s;
\r
spu.spuAddr += 2;
\r
spu.spuAddr &= 0x7fffe;
\r
return s;
\r
@@
-350,6
+368,19
@@
unsigned short CALLBACK SPUreadRegister(unsigned long reg)
case H_SPUMute2:
\r
log_unhandled("r isOn: %08lx\n", reg);
\r
break;
\r
case H_SPUMute2:
\r
log_unhandled("r isOn: %08lx\n", reg);
\r
break;
\r
+
\r
+ case 0x0dac:
\r
+ case H_SPUirqAddr:
\r
+ case H_CDLeft:
\r
+ case H_CDRight:
\r
+ case H_ExtLeft:
\r
+ case H_ExtRight:
\r
+ break;
\r
+
\r
+ default:
\r
+ if (r >= 0xda0)
\r
+ log_unhandled("spu r %08lx\n", reg);
\r
+ break;
\r
}
\r
\r
return spu.regArea[(r-0xc00)>>1];
\r
}
\r
\r
return spu.regArea[(r-0xc00)>>1];
\r
@@
-462,6
+493,7
@@
static void SetVolumeL(unsigned char ch,short vol) // LEFT VOLUME
\r
vol&=0x3fff;
\r
spu.s_chan[ch].iLeftVolume=vol; // store volume
\r
\r
vol&=0x3fff;
\r
spu.s_chan[ch].iLeftVolume=vol; // store volume
\r
+ //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 0] = vol << 1;
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r
@@
-489,6
+521,7
@@
static void SetVolumeR(unsigned char ch,short vol) // RIGHT VOLUME
vol&=0x3fff;
\r
\r
spu.s_chan[ch].iRightVolume=vol;
\r
vol&=0x3fff;
\r
\r
spu.s_chan[ch].iRightVolume=vol;
\r
+ //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 1] = vol << 1;
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r
@@
-504,11
+537,9
@@
static void SetPitch(int ch,unsigned short val) // SET PITCH
spu.s_chan[ch].iRawPitch = NP;
\r
spu.s_chan[ch].sinc = NP << 4;
\r
spu.s_chan[ch].sinc_inv = 0;
\r
spu.s_chan[ch].iRawPitch = NP;
\r
spu.s_chan[ch].sinc = NP << 4;
\r
spu.s_chan[ch].sinc_inv = 0;
\r
- spu.SB[ch * SB_SIZE + 32] = 1; // -> freq change in simple interpolation mode: set flag
\r
- if (val)
\r
- spu.dwChannelsAudible |= 1u << ch;
\r
- else
\r
- spu.dwChannelsAudible &= ~(1u << ch);
\r
+ spu.s_chan[ch].bNewPitch = 1;
\r
+
\r
+ // don't mess spu.dwChannelsAudible as adsr runs independently
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r
}
\r
\r
////////////////////////////////////////////////////////////////////////
\r