+ expect(ok, rl[0x70/4], 0xa5123456);
+ //expect(ok, rl[0x1070/4], v1070);
+ write32(&rl[0x70/4], 0);
+ // with RV 0x880000/0x900000 hangs, can't test
+ return ok;
+}
+
+static int t_32x_md_fb(void)
+{
+ u8 *fbb = (u8 *)0x840000;
+ u16 *fbw = (u16 *)fbb;
+ u32 *fbl = (u32 *)fbb;
+ u8 *fob = (u8 *)0x860000;
+ u16 *fow = (u16 *)fob;
+ u32 *fol = (u32 *)fob;
+ int ok = 1;
+
+ fbl[0] = 0x12345678;
+ fol[1] = 0x89abcdef;
+ mem_barrier();
+ expect(ok, fbw[1], 0x5678);
+ expect(ok, fow[2], 0x89ab);
+ fbb[0] = 0;
+ fob[1] = 0;
+ fbw[1] = 0;
+ fow[2] = 0;
+ fow[3] = 1;
+ mem_barrier();
+ fow[3] = 0x200;
+ mem_barrier();
+ expect(ok, fol[0], 0x12340000);
+ expect(ok, fbl[1], 0x89ab0201);
+ return ok;
+}
+
+static int t_32x_sh_fb(void)
+{
+ u32 *fbl = (u32 *)0x840000;
+ int ok = 1;
+
+ fbl[0] = 0x12345678;
+ fbl[1] = 0x89abcdef;
+ mem_barrier();
+ write8(0xa15100, 0x80); // FM=1
+ x32_cmd(CMD_WRITE8, 0x24000000, 0, 0);
+ x32_cmd(CMD_WRITE8, 0x24020001, 0, 0);
+ x32_cmd(CMD_WRITE16, 0x24000002, 0, 0);
+ x32_cmd(CMD_WRITE16, 0x24020000, 0, 0);
+ x32_cmd(CMD_WRITE32, 0x24020004, 0x5a0000a5, 1);
+ write8(0xa15100, 0x00); // FM=0
+ mem_barrier();
+ expect(ok, fbl[0], 0x12340000);
+ expect(ok, fbl[1], 0x5aabcda5);