- .long main_err /* Illegal instruction */
- .long 0x00000000 /* reserved */
- .long main_err /* Invalid slot instruction */
- .long 0x20100400 /* reserved */
- .long 0x20100420 /* reserved */
- .long main_err /* CPU address error */
- .long main_err /* DMA address error */
- .long main_err /* NMI vector */
- .long main_err /* User break vector */
- .space 76 /* reserved */
- .long main_err /* TRAPA #32 */
- .long main_err /* TRAPA #33 */
- .long main_err /* TRAPA #34 */
- .long main_err /* TRAPA #35 */
- .long main_err /* TRAPA #36 */
- .long main_err /* TRAPA #37 */
- .long main_err /* TRAPA #38 */
- .long main_err /* TRAPA #39 */
- .long main_err /* TRAPA #40 */
- .long main_err /* TRAPA #41 */
- .long main_err /* TRAPA #42 */
- .long main_err /* TRAPA #43 */
- .long main_err /* TRAPA #44 */
- .long main_err /* TRAPA #45 */
- .long main_err /* TRAPA #46 */
- .long main_err /* TRAPA #47 */
- .long main_err /* TRAPA #48 */
- .long main_err /* TRAPA #49 */
- .long main_err /* TRAPA #50 */
- .long main_err /* TRAPA #51 */
- .long main_err /* TRAPA #52 */
- .long main_err /* TRAPA #53 */
- .long main_err /* TRAPA #54 */
- .long main_err /* TRAPA #55 */
- .long main_err /* TRAPA #56 */
- .long main_err /* TRAPA #57 */
- .long main_err /* TRAPA #58 */
- .long main_err /* TRAPA #59 */
- .long main_err /* TRAPA #60 */
- .long main_err /* TRAPA #61 */
- .long main_err /* TRAPA #62 */
- .long main_err /* TRAPA #63 */
- .long main_irq /* Level 1 IRQ */
- .long main_irq /* Level 2 & 3 IRQ's */
- .long main_irq /* Level 4 & 5 IRQ's */
- .long main_irq /* PWM interupt */
- .long main_irq /* Command interupt */
- .long main_irq /* H Blank interupt */
- .long main_irq /* V Blank interupt */
- .long main_irq /* Reset Button */
- .long main_irq /* DMA1 TE INT */
-
-! Slave Vector Base Table at 0x06000124
+ .long master_e4 /* Illegal instruction */
+ .long master_e5 /* reserved */
+ .long master_e6 /* Invalid slot instruction */
+ .long master_e7 /* reserved */
+ .long master_e8 /* reserved */
+ .long master_e9 /* CPU address error */
+ .long master_e10 /* DMA address error */
+ .long master_e11 /* NMI vector */
+ .long master_e12 /* User break vector */
+.rept 19
+ .long master_err /* reserved */
+.endr
+.rept 32
+ .long master_err /* TRAPA #32-63 */
+.endr
+ .long master_irq0 /* Level 1 IRQ */
+ .long master_irq1 /* Level 2 & 3 IRQ's */
+ .long master_irq2 /* Level 4 & 5 IRQ's */
+ .long master_irq3 /* PWM interupt */
+ .long master_irq4 /* Command interupt */
+ .long master_irq5 /* H Blank interupt */
+ .long master_irq6 /* V Blank interupt */
+ .long master_irq7 /* Reset Button */
+.rept 56
+ .long master_err /* peripherals */
+.endr
+
+! Slave Vector Base Table at 0x06000200