// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006 notaz, All rights reserved.\r
+// (c) Copyright 2006,2007 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
-#define __debug_io\r
-\r
#include "PicoInt.h"\r
\r
#include "sound/ym2612.h"\r
u32 PicoRead16(u32 a);\r
void PicoWrite8(u32 a,u8 d);\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
-void PicoWriteRomHW_in1 (u32 a,u32 d);\r
#endif\r
\r
\r
\r
#ifdef IO_STATS\r
void log_io(unsigned int addr, int bits, int rw);\r
+#elif defined(_MSC_VER)\r
+#define log_io\r
#else\r
#define log_io(...)\r
#endif\r
#endif\r
\r
\r
-static u32 PicoCheckPc(u32 pc)\r
+PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
{\r
u32 ret=0;\r
#if defined(EMU_C68K)\r
// orr the bits, which are set as output\r
value = data_reg&(Pico.ioports[i+4]|0x80);\r
\r
- if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
+ if (PicoOpt & POPT_6BTN_PAD)\r
+ {\r
int phase = Pico.m.padTHPhase[i];\r
\r
if(phase == 2 && !(data_reg&0x40)) { // TH\r
u32 SRAMRead(u32 a)\r
{\r
unsigned int sreg = Pico.m.sram_reg;\r
- if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
+ if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
elprintf(EL_SRAMIO, "normal sram detected.");\r
Pico.m.sram_reg|=0x10; // should be normal SRAM\r
}\r
- if(sreg & 4) // EEPROM read\r
+ if (sreg & 4) // EEPROM read\r
return SRAMReadEEPROM();\r
else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
return *(u8 *)(SRam.data-SRam.start+a);\r
}\r
\r
+#ifndef _ASM_MEMORY_C\r
+static\r
+#endif\r
+u32 SRAMRead16(u32 a)\r
+{\r
+ u32 d;\r
+ if (Pico.m.sram_reg & 4) {\r
+ d = SRAMReadEEPROM();\r
+ d |= d << 8;\r
+ } else {\r
+ u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
+ d =*pm++ << 8;\r
+ d|=*pm++;\r
+ }\r
+ return d;\r
+}\r
+\r
static void SRAMWrite(u32 a, u32 d)\r
{\r
unsigned int sreg = Pico.m.sram_reg;\r
}\r
\r
// for nonstandard reads\r
-#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-u32 OtherRead16End(u32 a, int realsize)\r
+static u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
\r
+ // 32x test\r
+/*\r
+ if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
+ else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
+ else if (a == 0xa15100) { d = 0x0080; goto end; }\r
+ else\r
+*/\r
+\r
// for games with simple protection devices, discovered by Haze\r
// some dumb detection is used, but that should be enough to make things work\r
if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
#endif\r
elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
\r
- if(a >= 0xA13004 && a < 0xA13040) {\r
- // dumb 12-in-1 or 4-in-1 banking support\r
- int len;\r
- a &= 0x3f; a <<= 16;\r
- len = Pico.romsize - a;\r
- if (len <= 0) return; // invalid/missing bank\r
- if (len > 0x200000) len = 0x200000; // 2 megs\r
- memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
- return;\r
- }\r
-\r
// for games with simple protection devices, discovered by Haze\r
- else if ((a>>22) == 1)\r
+ if ((a>>22) == 1)\r
Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
}\r
\r
-\r
#include "MemoryCmn.c"\r
\r
\r
\r
#ifndef EMU_CORE_DEBUG\r
// sram\r
- if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
+ if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = SRAMRead(a);\r
elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
goto end;\r
log_io(a, 8, 0);\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
- d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
+ if ((a&0xe700e0)==0xc00000) // VDP\r
+ d=PicoVideoRead(a);\r
+ else d=OtherRead16(a&~1, 8);\r
+ if ((a&1)==0) d>>=8;\r
\r
end:\r
-#ifdef __debug_io\r
- dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
- if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
+ if (a>=Pico.romsize) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = (u8)d;\r
}\r
\r
#ifndef EMU_CORE_DEBUG\r
// sram\r
- if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
- d = SRAMRead(a);\r
- d |= d<<8;\r
+ if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
+ d = SRAMRead16(a);\r
elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
goto end;\r
}\r
if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
log_io(a, 16, 0);\r
\r
- d = OtherRead16(a, 16);\r
+ if ((a&0xe700e0)==0xc00000)\r
+ d = PicoVideoRead(a);\r
+ else d = OtherRead16(a, 16);\r
\r
end:\r
-#ifdef __debug_io\r
- dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
- if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
+ if (a>=Pico.romsize) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = d;\r
}\r
\r
// sram\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
- d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
- d |= d<<8;\r
+ d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
goto end;\r
}\r
if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
log_io(a, 32, 0);\r
\r
- d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
+ if ((a&0xe700e0)==0xc00000)\r
+ d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
+ else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
end:\r
-#ifdef __debug_io\r
- dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
- if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
+ if (a>=Pico.romsize) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = d;\r
}\r
// -----------------------------------------------------------------\r
// Write Ram\r
\r
-#ifndef _ASM_MEMORY_C\r
+#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
void PicoWrite16(u32 a,u16 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w16: %06x, %04x", a&0xffffff, d);\r
-#endif\r
+ elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
log_io(a, 16, 1);\r
\r
a&=0xfffffe;\r
+ if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
OtherWrite16(a,d);\r
}\r
\r
static void PicoWrite32(u32 a,u32 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w32: %06x, %08x", a&0xffffff, d);\r
-#endif\r
+ elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
log_io(a, 32, 1);\r
\r
a&=0xfffffe;\r
+ if ((a&0xe700e0)==0xc00000)\r
+ {\r
+ // VDP:\r
+ PicoVideoWrite(a, (u16)(d>>16));\r
+ PicoVideoWrite(a+2,(u16)d);\r
+ return;\r
+ }\r
+\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
}\r
\r
\r
// -----------------------------------------------------------------\r
+\r
+static void OtherWrite16End(u32 a,u32 d,int realsize)\r
+{\r
+ PicoWrite8Hook(a, d>>8, realsize);\r
+ PicoWrite8Hook(a+1,d&0xff, realsize);\r
+}\r
+\r
+u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
+void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
+void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
+\r
+PICO_INTERNAL void PicoMemResetHooks(void)\r
+{\r
+ // default unmapped/cart specific handlers\r
+ PicoRead16Hook = OtherRead16End;\r
+ PicoWrite8Hook = OtherWrite8End;\r
+ PicoWrite16Hook = OtherWrite16End;\r
+}\r
+\r
+#ifdef EMU_M68K\r
+static void m68k_mem_setup(void);\r
+#endif\r
+\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
// Setup memory callbacks:\r
// setup FAME fetchmap\r
{\r
int i;\r
- // by default, point everything to fitst 64k of ROM\r
+ // by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
}\r
#endif\r
+#ifdef EMU_M68K\r
+ m68k_mem_setup();\r
+#endif\r
}\r
\r
-\r
+/* some nasty things below :( */\r
#ifdef EMU_M68K\r
-unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
-unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
-unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
-\r
-// these are allowed to access RAM\r
-static unsigned int m68k_read_8 (unsigned int a, int do_fake) {\r
+unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
+void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
+void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
+void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
+\r
+// these are here for core debugging mode\r
+static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
+{\r
a&=0xffffff;\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
- if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_8(a);\r
}\r
-static unsigned int m68k_read_16(unsigned int a, int do_fake) {\r
+static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
+{\r
a&=0xffffff;\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
- if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_16(a);\r
}\r
-static unsigned int m68k_read_32(unsigned int a, int do_fake) {\r
+static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
+{\r
a&=0xffffff;\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
- if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
+ if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_32(a);\r
}\r
\r
unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
\r
+static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
+ return 0;\r
+}\r
+\r
+static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
+ return 0;\r
+}\r
+\r
+static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
+ return 0;\r
+}\r
+\r
#ifdef EMU_CORE_DEBUG\r
// ROM only\r
unsigned int m68k_read_memory_8(unsigned int a)\r
{\r
u8 d;\r
- if(a<Pico.romsize) d = *(u8 *) (Pico.rom+(a^1));\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
+ d = *(u8 *) (Pico.rom+(a^1));\r
else d = (u8) lastread_d[lrp_mus++&15];\r
-#ifdef __debug_io\r
- dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
return d;\r
}\r
unsigned int m68k_read_memory_16(unsigned int a)\r
{\r
u16 d;\r
- if(a<Pico.romsize) d = *(u16 *)(Pico.rom+(a&~1));\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
+ d = *(u16 *)(Pico.rom+(a&~1));\r
else d = (u16) lastread_d[lrp_mus++&15];\r
-#ifdef __debug_io\r
- dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
return d;\r
}\r
unsigned int m68k_read_memory_32(unsigned int a)\r
{\r
u32 d;\r
- if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1];}\r
+ if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
+ { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
+ else if (a <= 0x78) d = m68k_read_32(a, 0);\r
else d = lastread_d[lrp_mus++&15];\r
-#ifdef __debug_io\r
- dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
return d;\r
}\r
\r
void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-#else\r
-unsigned char PicoReadCD8w (unsigned int a);\r
-unsigned short PicoReadCD16w(unsigned int a);\r
-unsigned int PicoReadCD32w(unsigned int a);\r
-void PicoWriteCD8w (unsigned int a, unsigned char d);\r
-void PicoWriteCD16w(unsigned int a, unsigned short d);\r
-void PicoWriteCD32w(unsigned int a, unsigned int d);\r
\r
-/* it appears that Musashi doesn't always mask the unused bits */\r
-unsigned int m68k_read_memory_8(unsigned int address)\r
-{\r
- unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
- return d&0xff;\r
-}\r
+#else // if !EMU_CORE_DEBUG\r
\r
-unsigned int m68k_read_memory_16(unsigned int address)\r
-{\r
- unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
- return d&0xffff;\r
-}\r
-\r
-unsigned int m68k_read_memory_32(unsigned int address)\r
-{\r
- return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
-}\r
-\r
-void m68k_write_memory_8(unsigned int address, unsigned int value)\r
-{\r
- if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
-}\r
-\r
-void m68k_write_memory_16(unsigned int address, unsigned int value)\r
-{\r
- if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
-}\r
-\r
-void m68k_write_memory_32(unsigned int address, unsigned int value)\r
+/* it appears that Musashi doesn't always mask the unused bits */\r
+unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
+unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
+unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
+void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
+void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
+void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
+#endif // !EMU_CORE_DEBUG\r
+\r
+static void m68k_mem_setup(void)\r
{\r
- if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
+ pm68k_read_memory_8 = PicoRead8;\r
+ pm68k_read_memory_16 = PicoRead16;\r
+ pm68k_read_memory_32 = PicoRead32;\r
+ pm68k_write_memory_8 = PicoWrite8;\r
+ pm68k_write_memory_16 = PicoWrite16;\r
+ pm68k_write_memory_32 = PicoWrite32;\r
+ pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
+ pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
+ pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
}\r
-#endif\r
#endif // EMU_M68K\r
\r
\r
{\r
u8 ret = 0;\r
\r
-#ifndef _USE_DRZ80\r
- if (a<0x4000) return Pico.zram[a&0x1fff];\r
-#endif\r
-\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if (PicoOpt&1) ret = (u8) YM2612Read();\r
+ if (PicoOpt&POPT_EN_FM) ret = (u8) YM2612Read();\r
return ret;\r
}\r
\r
if (a>=0x8000)\r
{\r
+ extern u32 PicoReadM68k8(u32 a);\r
u32 addr68k;\r
addr68k=Pico.m.z80_bank68k<<15;\r
addr68k+=a&0x7fff;\r
\r
- ret = (u8) PicoRead8(addr68k);\r
+ if (PicoAHW & PAHW_MCD)\r
+ ret = PicoReadM68k8(addr68k);\r
+ else ret = PicoRead8(addr68k);\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
return ret;\r
}\r
\r
-#ifdef _USE_DRZ80\r
- // should not be needed || dprintf("z80_read RAM");\r
+ // should not be needed, cores should be able to access RAM themselves\r
if (a<0x4000) return Pico.zram[a&0x1fff];\r
-#endif\r
\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
return ret;\r
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
#endif\r
{\r
-#ifndef _USE_DRZ80\r
- if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
-#endif\r
-\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;\r
+ if(PicoOpt&POPT_EN_FM) emustatus|=YM2612Write(a, data) & 1;\r
return;\r
}\r
\r
if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
{\r
- if(PicoOpt&2) SN76496Write(data);\r
+ if(PicoOpt&POPT_EN_PSG) SN76496Write(data);\r
return;\r
}\r
\r
\r
if (a>=0x8000)\r
{\r
+ extern void PicoWriteM68k8(u32 a,u8 d);\r
u32 addr68k;\r
addr68k=Pico.m.z80_bank68k<<15;\r
addr68k+=a&0x7fff;\r
elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
- PicoWrite8(addr68k, data);\r
+ if (PicoAHW & PAHW_MCD)\r
+ PicoWriteM68k8(addr68k, data);\r
+ else PicoWrite8(addr68k, data);\r
return;\r
}\r
\r
-#ifdef _USE_DRZ80\r
- // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
+ // should not be needed\r
if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
-#endif\r
\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
notaz.gp2x.de / picodrive.git / blobdiff