adjustments for MAME

[picodrive.git] / Pico / Memory.c

diff --git a/Pico/Memory.c b/Pico/Memory.c
index c9c9a02..21db15e 100644 (file)
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -70,6 +70,8 @@ static u32 CPU_CALL PicoCheckPc(u32 pc)
 #if defined(EMU_C68K)\r
   pc-=PicoCpu.membase; // Get real pc\r
   pc&=0xfffffe;\r
+  if (pc == 0)\r
+    return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
 \r
   PicoCpu.membase=PicoMemBase(pc);\r
 \r
@@ -192,6 +194,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
   //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
   //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
   if(a >= SRam.start && a <= SRam.end) {\r
+    dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
     unsigned int sreg = Pico.m.sram_reg;\r
     if(!(sreg & 0x10)) {\r
       // not detected SRAM\r
@@ -229,7 +232,9 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
 #else\r
   // sram access register\r
   if(a == 0xA130F1) {\r
-    Pico.m.sram_reg = (u8)(d&3);\r
+    dprintf("sram reg=%02x", d);\r
+    Pico.m.sram_reg &= ~3;\r
+    Pico.m.sram_reg |= (u8)(d&3);\r
     return;\r
   }\r
 #endif\r
@@ -392,16 +397,13 @@ static void CPU_CALL PicoWrite8(u32 a,u8 d)
   //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
   //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
 \r
-\r
-  if ((a&0xe00000)==0xe00000) {\r
-         if((a&0xffff)==0xf62a) dprintf("(f62a) = %02x [%i|%i] @ %x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r
-          u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
+  if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
 \r
   a&=0xffffff;\r
   OtherWrite8(a,d,8);\r
 }\r
 \r
-static void CPU_CALL PicoWrite16(u32 a,u16 d)\r
+void CPU_CALL PicoWrite16(u32 a,u16 d)\r
 {\r
 #ifdef __debug_io\r
   dprintf("w16: %06x, %04x", a&0xffffff, d);\r