#define log_io(...)\r
#endif\r
\r
-#if defined(EMU_C68K) || defined(EMU_A68K)\r
+#if defined(EMU_C68K)\r
static __inline int PicoMemBase(u32 pc)\r
{\r
int membase=0;\r
#endif\r
\r
\r
-#ifdef EMU_A68K\r
-extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
-#endif\r
-\r
-static u32 CPU_CALL PicoCheckPc(u32 pc)\r
+static u32 PicoCheckPc(u32 pc)\r
{\r
u32 ret=0;\r
#if defined(EMU_C68K)\r
- pc-=PicoCpu.membase; // Get real pc\r
+ pc-=PicoCpuCM68k.membase; // Get real pc\r
// pc&=0xfffffe;\r
pc&=~1;\r
if ((pc<<8) == 0)\r
+ {\r
+ printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc);\r
return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
+ }\r
\r
- PicoCpu.membase=PicoMemBase(pc&0x00ffffff);\r
- PicoCpu.membase-=pc&0xff000000;\r
-\r
- ret = PicoCpu.membase+pc;\r
-#elif defined(EMU_A68K)\r
- OP_ROM=(u8 *)PicoMemBase(pc);\r
+ PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
+ PicoCpuCM68k.membase-=pc&0xff000000;\r
\r
- // don't bother calling us back unless it's outside the 64k segment\r
- M68000_regs.AsmBank=(pc>>16);\r
+ ret = PicoCpuCM68k.membase+pc;\r
#endif\r
return ret;\r
}\r
{\r
unsigned int sreg = Pico.m.sram_reg;\r
if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
+ elprintf(EL_SRAMIO, "normal sram detected.");\r
Pico.m.sram_reg|=0x10; // should be normal SRAM\r
}\r
if(sreg & 4) // EEPROM read\r
\r
static void SRAMWrite(u32 a, u32 d)\r
{\r
- dprintf("sram_w: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
unsigned int sreg = Pico.m.sram_reg;\r
if(!(sreg & 0x10)) {\r
// not detected SRAM\r
if((a&~1)==0x200000) {\r
- Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
+ elprintf(EL_SRAMIO, "eeprom detected.");\r
+ sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
SRam.start=0x200000; SRam.end=SRam.start+1;\r
- }\r
- Pico.m.sram_reg|=0x10;\r
+ } else\r
+ elprintf(EL_SRAMIO, "normal sram detected.");\r
+ sreg|=0x10;\r
+ Pico.m.sram_reg=sreg;\r
}\r
if(sreg & 4) { // EEPROM write\r
- if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
+ // this diff must be at most 16 for NBA Jam to work\r
+ if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
// just update pending state\r
+ elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
SRAMUpdPending(a, d);\r
} else {\r
+ int old=sreg;\r
SRAMWriteEEPROM(sreg>>6); // execute pending\r
SRAMUpdPending(a, d);\r
- lastSSRamWrite = SekCyclesDoneT();\r
+ if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
+ lastSSRamWrite = SekCyclesDoneT();\r
}\r
} else if(!(sreg & 2)) {\r
u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
{\r
u32 d=0;\r
\r
- dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
-\r
// for games with simple protection devices, discovered by Haze\r
// some dumb detection is used, but that should be enough to make things work\r
if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
}\r
\r
end:\r
- dprintf("ret = %04x", d);\r
+ elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
return d;\r
}\r
\r
static void OtherWrite8End(u32 a,u32 d,int realsize)\r
{\r
// sram\r
- //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
- //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
if(a >= SRam.start && a <= SRam.end) {\r
+ elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc);\r
SRAMWrite(a, d);\r
return;\r
}\r
#else\r
// sram access register\r
if(a == 0xA130F1) {\r
- dprintf("sram reg=%02x", d);\r
+ elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
Pico.m.sram_reg &= ~3;\r
Pico.m.sram_reg |= (u8)(d&3);\r
return;\r
}\r
#endif\r
- dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
\r
if(a >= 0xA13004 && a < 0xA13040) {\r
// dumb 12-in-1 or 4-in-1 banking support\r
// Read Rom and read Ram\r
\r
#ifndef _ASM_MEMORY_C\r
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)\r
+PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
{\r
u32 d=0;\r
\r
// sram\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = SRAMRead(a);\r
+ elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
goto end;\r
}\r
#endif\r
\r
d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
\r
- end:\r
-\r
- //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
- // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
- //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
- // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-\r
- //if(a==0x200001||a==0x200000) printf("r8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());\r
- //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
+end:\r
#ifdef __debug_io\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#endif\r
return d;\r
}\r
\r
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)\r
+PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
{\r
u32 d=0;\r
\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = SRAMRead(a);\r
d |= d<<8;\r
+ elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
goto end;\r
}\r
#endif\r
\r
d = OtherRead16(a, 16);\r
\r
- end:\r
- //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
- // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
- //if(a==0x200000) printf("r16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
-\r
+end:\r
#ifdef __debug_io\r
dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
return d;\r
}\r
\r
-PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)\r
+PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
{\r
u32 d=0;\r
\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
d |= d<<8;\r
+ elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
goto end;\r
}\r
\r
\r
d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
- end:\r
- //if(a==0x200000) printf("r32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
+end:\r
#ifdef __debug_io\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
// Write Ram\r
\r
#ifndef _ASM_MEMORY_C\r
-PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)\r
+PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
{\r
#ifdef __debug_io\r
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
}\r
#endif\r
\r
-void CPU_CALL PicoWrite16(u32 a,u16 d)\r
+void PicoWrite16(u32 a,u16 d)\r
{\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
- //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
- // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
- //if(a==0x200000) printf("w16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
\r
if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
log_io(a, 16, 1);\r
OtherWrite16(a,d);\r
}\r
\r
-static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
+static void PicoWrite32(u32 a,u32 d)\r
{\r
#ifdef __debug_io\r
dprintf("w32: %06x, %08x", a&0xffffff, d);\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
- //if(a==0x200000) printf("w32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
\r
if ((a&0xe00000)==0xe00000)\r
{\r
// -----------------------------------------------------------------\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
-#ifdef EMU_C68K\r
// Setup memory callbacks:\r
- PicoCpu.checkpc=PicoCheckPc;\r
- PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
- PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
- PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
- PicoCpu.write8 =PicoWrite8;\r
- PicoCpu.write16=PicoWrite16;\r
- PicoCpu.write32=PicoWrite32;\r
+#ifdef EMU_C68K\r
+ PicoCpuCM68k.checkpc=PicoCheckPc;\r
+ PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
+ PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
+ PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
+ PicoCpuCM68k.write8 =PicoWrite8;\r
+ PicoCpuCM68k.write16=PicoWrite16;\r
+ PicoCpuCM68k.write32=PicoWrite32;\r
+#endif\r
+#ifdef EMU_F68K\r
+ PicoCpuFM68k.read_byte =PicoRead8;\r
+ PicoCpuFM68k.read_word =PicoRead16;\r
+ PicoCpuFM68k.read_long =PicoRead32;\r
+ PicoCpuFM68k.write_byte=PicoWrite8;\r
+ PicoCpuFM68k.write_word=PicoWrite16;\r
+ PicoCpuFM68k.write_long=PicoWrite32;\r
+\r
+ // setup FAME fetchmap\r
+ {\r
+ int i;\r
+ // by default, point everything to fitst 64k of ROM\r
+ for (i = 0; i < M68K_FETCHBANK1; i++)\r
+ PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ // now real ROM\r
+ for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
+ PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ // .. and RAM\r
+ for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
+ PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ }\r
#endif\r
}\r
\r
-#ifdef EMU_A68K\r
-struct A68KInter\r
-{\r
- u32 unknown;\r
- u8 (__fastcall *Read8) (u32 a);\r
- u16 (__fastcall *Read16)(u32 a);\r
- u32 (__fastcall *Read32)(u32 a);\r
- void (__fastcall *Write8) (u32 a,u8 d);\r
- void (__fastcall *Write16) (u32 a,u16 d);\r
- void (__fastcall *Write32) (u32 a,u32 d);\r
- void (__fastcall *ChangePc)(u32 a);\r
- u8 (__fastcall *PcRel8) (u32 a);\r
- u16 (__fastcall *PcRel16)(u32 a);\r
- u32 (__fastcall *PcRel32)(u32 a);\r
- u16 (__fastcall *Dir16)(u32 a);\r
- u32 (__fastcall *Dir32)(u32 a);\r
-};\r
-\r
-struct A68KInter a68k_memory_intf=\r
-{\r
- 0,\r
- PicoRead8,\r
- PicoRead16,\r
- PicoRead32,\r
- PicoWrite8,\r
- PicoWrite16,\r
- PicoWrite32,\r
- PicoCheckPc,\r
- PicoRead8,\r
- PicoRead16,\r
- PicoRead32,\r
- PicoRead16, // unused\r
- PicoRead32, // unused\r
-};\r
-#endif\r
\r
#ifdef EMU_M68K\r
unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
void PicoWriteCD16w(unsigned int a, unsigned short d);\r
void PicoWriteCD32w(unsigned int a, unsigned int d);\r
\r
+/* it appears that Musashi doesn't always mask the unused bits */\r
unsigned int m68k_read_memory_8(unsigned int address)\r
{\r
- return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
+ unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
+ return d&0xff;\r
}\r
\r
unsigned int m68k_read_memory_16(unsigned int address)\r
{\r
- return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
+ unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
+ return d&0xffff;\r
}\r
\r
unsigned int m68k_read_memory_32(unsigned int address)\r
addr68k+=a&0x7fff;\r
\r
ret = (u8) PicoRead8(addr68k);\r
- //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r
+ elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
goto end;\r
}\r
\r
// should not be needed || dprintf("z80_read RAM");\r
if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
\r
+ elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
+\r
end:\r
return ret;\r
}\r
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
+ if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;\r
return;\r
}\r
\r
u32 addr68k;\r
addr68k=Pico.m.z80_bank68k<<15;\r
addr68k+=a&0x7fff;\r
+ elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
PicoWrite8(addr68k, data);\r
- //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r
return;\r
}\r
\r
// should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
+\r
+ elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
\r
PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
notaz.gp2x.de / picodrive.git / blobdiff