sram handling refactored

[picodrive.git] / Pico / Memory.c

diff --git a/Pico/Memory.c b/Pico/Memory.c
index dc9c738..72c4396 100644 (file)
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -144,14 +144,49 @@ int PadRead(int i)
 \r
 \r
 #ifndef _ASM_MEMORY_C\r
-// address must already be checked\r
-static int SRAMRead(u32 a)\r
+static\r
+#endif\r
+u32 SRAMRead(u32 a)\r
 {\r
-  u8 *d = SRam.data-SRam.start+a;\r
-  return (d[0]<<8)|d[1];\r
+  unsigned int sreg = Pico.m.sram_reg;\r
+  if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
+    Pico.m.sram_reg|=0x10; // should be normal SRAM\r
+  }\r
+  if(sreg & 4) // EEPROM read\r
+    return SRAMReadEEPROM();\r
+  else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
+    return *(u8 *)(SRam.data-SRam.start+a);\r
 }\r
-#endif\r
 \r
+static void SRAMWrite(u32 a, u32 d)\r
+{\r
+  dprintf("sram_w: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
+  unsigned int sreg = Pico.m.sram_reg;\r
+  if(!(sreg & 0x10)) {\r
+    // not detected SRAM\r
+    if((a&~1)==0x200000) {\r
+      Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
+      SRam.start=0x200000; SRam.end=SRam.start+1;\r
+    }\r
+    Pico.m.sram_reg|=0x10;\r
+  }\r
+  if(sreg & 4) { // EEPROM write\r
+    if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
+      // just update pending state\r
+      SRAMUpdPending(a, d);\r
+    } else {\r
+      SRAMWriteEEPROM(sreg>>6); // execute pending\r
+      SRAMUpdPending(a, d);\r
+      lastSSRamWrite = SekCyclesDoneT();\r
+    }\r
+  } else if(!(sreg & 2)) {\r
+    u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
+    if(*pm != (u8)d) {\r
+      SRam.changed = 1;\r
+      *pm=(u8)d;\r
+    }\r
+  }\r
+}\r
 \r
 // for nonstandard reads\r
 #ifndef _ASM_MEMORY_C\r
@@ -237,32 +272,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
   //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
   //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
   if(a >= SRam.start && a <= SRam.end) {\r
-    dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
-    unsigned int sreg = Pico.m.sram_reg;\r
-    if(!(sreg & 0x10)) {\r
-      // not detected SRAM\r
-      if((a&~1)==0x200000) {\r
-        Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
-        SRam.start=0x200000; SRam.end=SRam.start+1;\r
-      }\r
-      Pico.m.sram_reg|=0x10;\r
-    }\r
-    if(sreg & 4) { // EEPROM write\r
-      if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
-        // just update pending state\r
-        SRAMUpdPending(a, d);\r
-      } else {\r
-        SRAMWriteEEPROM(sreg>>6); // execute pending\r
-        SRAMUpdPending(a, d);\r
-        lastSSRamWrite = SekCyclesDoneT();\r
-      }\r
-    } else if(!(sreg & 2)) {\r
-      u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
-      if(*pm != (u8)d) {\r
-        SRam.changed = 1;\r
-        *pm=(u8)d;\r
-      }\r
-    }\r
+    SRAMWrite(a, d);\r
     return;\r
   }\r
 \r
@@ -317,18 +327,9 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 \r
 #if !(defined(EMU_C68K) && defined(EMU_M68K))\r
   // sram\r
-  if(a >= SRam.start && a <= SRam.end) {\r
-    unsigned int sreg = Pico.m.sram_reg;\r
-    if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
-      Pico.m.sram_reg|=0x10; // should be normal SRAM\r
-    }\r
-    if(sreg & 4) { // EEPROM read\r
-      d = SRAMReadEEPROM();\r
-      goto end;\r
-    } else if(sreg & 1) {\r
-      d = *(u8 *)(SRam.data-SRam.start+a);\r
-      goto end;\r
-    }\r
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
+    d = SRAMRead(a);\r
+    goto end;\r
   }\r
 #endif\r
 \r
@@ -345,7 +346,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
   //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
   //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
 \r
-  //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
+  //if(a==0x200001||a==0x200000) printf("r8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());\r
   //dprintf("r8 : %06x,   %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
 #ifdef __debug_io\r
   dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
@@ -369,8 +370,9 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 \r
 #if !(defined(EMU_C68K) && defined(EMU_M68K))\r
   // sram\r
-  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
     d = SRAMRead(a);\r
+    d |= d<<8;\r
     goto end;\r
   }\r
 #endif\r
@@ -383,6 +385,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
   end:\r
   //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
   //  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
+  //if(a==0x200000) printf("r16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 \r
 #ifdef __debug_io\r
   dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
@@ -405,8 +408,9 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   a&=0xfffffe;\r
 \r
   // sram\r
-  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
+  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
     d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
+    d |= d<<8;\r
     goto end;\r
   }\r
 \r
@@ -416,6 +420,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
 \r
   end:\r
+  //if(a==0x200000) printf("r32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 #ifdef __debug_io\r
   dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
 #endif\r
@@ -442,6 +447,7 @@ PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)
   lastwrite_cyc_d[lwp_cyc++&15] = d;\r
 #endif\r
   //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
+  //if(a==0x200000||a==0x200001) printf("w8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());\r
   //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
 \r
   if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
@@ -462,6 +468,7 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
 #endif\r
   //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
   //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
+  //if(a==0x200000) printf("w16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 \r
   if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
   log_io(a, 16, 1);\r
@@ -478,6 +485,7 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)\r
   lastwrite_cyc_d[lwp_cyc++&15] = d;\r
 #endif\r
+  //if(a==0x200000) printf("w32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 \r
   if ((a&0xe00000)==0xe00000)\r
   {\r