removed z80 cycle code in nonacc mode as it was only causing trouble

[picodrive.git] / Pico / Memory.c

diff --git a/Pico/Memory.c b/Pico/Memory.c
index 01e92f4..dc9c738 100644 (file)
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -26,6 +26,7 @@ extern unsigned int lastSSRamWrite; // used by serial SRAM code
 #ifdef _ASM_MEMORY_C\r
 u32  PicoRead8(u32 a);\r
 u32  PicoRead16(u32 a);\r
+void PicoWrite8(u32 a,u8 d);\r
 void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
 void PicoWriteRomHW_in1 (u32 a,u32 d);\r
 #endif\r
@@ -38,6 +39,12 @@ int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
 extern unsigned int ppop;\r
 #endif\r
 \r
+#ifdef IO_STATS\r
+void log_io(unsigned int addr, int bits, int rw);\r
+#else\r
+#define log_io(...)\r
+#endif\r
+\r
 #if defined(EMU_C68K) || defined(EMU_A68K)\r
 static __inline int PicoMemBase(u32 pc)\r
 {\r
@@ -104,6 +111,38 @@ PICO_INTERNAL_ASM void PicoMemReset(void)
 \r
 // -----------------------------------------------------------------\r
 \r
+int PadRead(int i)\r
+{\r
+  int pad,value,data_reg;\r
+  pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
+  data_reg=Pico.ioports[i+1];\r
+\r
+  // orr the bits, which are set as output\r
+  value = data_reg&(Pico.ioports[i+4]|0x80);\r
+\r
+  if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
+    int phase = Pico.m.padTHPhase[i];\r
+\r
+    if(phase == 2 && !(data_reg&0x40)) { // TH\r
+      value|=(pad&0xc0)>>2;              // ?0SA 0000\r
+      return value;\r
+    } else if(phase == 3) {\r
+      if(data_reg&0x40)\r
+        value|=(pad&0x30)|((pad>>8)&0xf);  // ?1CB MXYZ\r
+      else\r
+        value|=((pad&0xc0)>>2)|0x0f;       // ?0SA 1111\r
+      return value;\r
+    }\r
+  }\r
+\r
+  if(data_reg&0x40) // TH\r
+       value|=(pad&0x3f);              // ?1CB RLDU\r
+  else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
+\r
+  return value; // will mirror later\r
+}\r
+\r
+\r
 #ifndef _ASM_MEMORY_C\r
 // address must already be checked\r
 static int SRAMRead(u32 a)\r
@@ -294,6 +333,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 #endif\r
 \r
   if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
+  log_io(a, 8, 0);\r
   if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
 \r
   d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
@@ -336,6 +376,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 #endif\r
 \r
   if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
+  log_io(a, 16, 0);\r
 \r
   d = OtherRead16(a, 16);\r
 \r
@@ -370,6 +411,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   }\r
 \r
   if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
+  log_io(a, 32, 0);\r
 \r
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
 \r
@@ -390,7 +432,8 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
 // -----------------------------------------------------------------\r
 //                            Write Ram\r
 \r
-static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
+#ifndef _ASM_MEMORY_C\r
+PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)\r
 {\r
 #ifdef __debug_io\r
   dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
@@ -402,10 +445,12 @@ static void CPU_CALL PicoWrite8(u32 a,u8 d)
   //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
 \r
   if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
+  log_io(a, 8, 1);\r
 \r
   a&=0xffffff;\r
-  OtherWrite8(a,d,8);\r
+  OtherWrite8(a,d);\r
 }\r
+#endif\r
 \r
 void CPU_CALL PicoWrite16(u32 a,u16 d)\r
 {\r
@@ -419,6 +464,7 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
   //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
 \r
   if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
+  log_io(a, 16, 1);\r
 \r
   a&=0xfffffe;\r
   OtherWrite16(a,d);\r
@@ -440,6 +486,7 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
     pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
     return;\r
   }\r
+  log_io(a, 32, 1);\r
 \r
   a&=0xfffffe;\r
   OtherWrite16(a,  (u16)(d>>16));\r