#endif\r
\r
\r
-static u32 PicoCheckPc(u32 pc)\r
+PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
{\r
u32 ret=0;\r
#if defined(EMU_C68K)\r
// orr the bits, which are set as output\r
value = data_reg&(Pico.ioports[i+4]|0x80);\r
\r
- if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
+ if (PicoOpt & POPT_6BTN_PAD)\r
+ {\r
int phase = Pico.m.padTHPhase[i];\r
\r
if(phase == 2 && !(data_reg&0x40)) { // TH\r
{\r
u32 d=0;\r
\r
+ // 32x test\r
+/*\r
+ if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
+ else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
+ else if (a == 0xa15100) { d = 0x0080; goto end; }\r
+ else\r
+*/\r
+\r
// for games with simple protection devices, discovered by Haze\r
// some dumb detection is used, but that should be enough to make things work\r
if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
\r
// -----------------------------------------------------------------\r
\r
-// TODO: asm code\r
static void OtherWrite16End(u32 a,u32 d,int realsize)\r
{\r
PicoWrite8Hook(a, d>>8, realsize);\r
PicoWrite16Hook = OtherWrite16End;\r
}\r
\r
+#ifdef EMU_M68K\r
+static void m68k_mem_setup(void);\r
+#endif\r
+\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
// Setup memory callbacks:\r
// setup FAME fetchmap\r
{\r
int i;\r
- // by default, point everything to fitst 64k of ROM\r
+ // by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
}\r
#endif\r
+#ifdef EMU_M68K\r
+ m68k_mem_setup();\r
+#endif\r
}\r
\r
-\r
+/* some nasty things below :( */\r
#ifdef EMU_M68K\r
-unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
-unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
-unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
-\r
-// these are allowed to access RAM\r
+unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
+void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
+void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
+void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
+unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
+\r
+// these are here for core debugging mode\r
static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
{\r
a&=0xffffff;\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_8(a);\r
}\r
static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
{\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_16(a);\r
}\r
static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
{\r
#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
- if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- return 0;\r
+ return pm68k_read_memory_pcr_32(a);\r
}\r
\r
unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
\r
+static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
+ return 0;\r
+}\r
+\r
+static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
+ return 0;\r
+}\r
+\r
+static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
+{\r
+ if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
+ return 0;\r
+}\r
+\r
#ifdef EMU_CORE_DEBUG\r
// ROM only\r
unsigned int m68k_read_memory_8(unsigned int a)\r
void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-#else\r
-unsigned char PicoReadCD8w (unsigned int a);\r
-unsigned short PicoReadCD16w(unsigned int a);\r
-unsigned int PicoReadCD32w(unsigned int a);\r
-void PicoWriteCD8w (unsigned int a, unsigned char d);\r
-void PicoWriteCD16w(unsigned int a, unsigned short d);\r
-void PicoWriteCD32w(unsigned int a, unsigned int d);\r
+\r
+#else // if !EMU_CORE_DEBUG\r
\r
/* it appears that Musashi doesn't always mask the unused bits */\r
-unsigned int m68k_read_memory_8(unsigned int address)\r
+unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
+unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
+unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
+void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
+void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
+void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
+#endif // !EMU_CORE_DEBUG\r
+\r
+static void m68k_mem_setup(void)\r
{\r
- unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
- return d&0xff;\r
+ pm68k_read_memory_8 = PicoRead8;\r
+ pm68k_read_memory_16 = PicoRead16;\r
+ pm68k_read_memory_32 = PicoRead32;\r
+ pm68k_write_memory_8 = PicoWrite8;\r
+ pm68k_write_memory_16 = PicoWrite16;\r
+ pm68k_write_memory_32 = PicoWrite32;\r
+ pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
+ pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
+ pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
}\r
+#endif // EMU_M68K\r
+\r
+\r
+// -----------------------------------------------------------------\r
+\r
+extern const unsigned short vcounts[];\r
\r
-unsigned int m68k_read_memory_16(unsigned int address)\r
+static int get_scanline(int is_from_z80)\r
{\r
- unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
- return d&0xffff;\r
+ if (is_from_z80) {\r
+ int cycles = z80_cyclesDone();\r
+ while (cycles - z80_scanline_cycles >= 228)\r
+ z80_scanline++, z80_scanline_cycles += 228;\r
+ return z80_scanline;\r
+ }\r
+\r
+ if (Pico.m.scanline != -1)\r
+ return Pico.m.scanline;\r
+\r
+ return vcounts[SekCyclesDone()>>8];\r
}\r
\r
-unsigned int m68k_read_memory_32(unsigned int address)\r
+/* probably not should be in this file, but it's near related code here */\r
+void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r
{\r
- return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
+ int xcycles = z80_cycles << 8;\r
+\r
+ /* check for overflows */\r
+ if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r
+ ym2612.OPN.ST.status |= 1;\r
+\r
+ if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r
+ ym2612.OPN.ST.status |= 2;\r
+\r
+ /* update timer a */\r
+ if (mode_old & 1)\r
+ while (xcycles >= timer_a_next_oflow)\r
+ timer_a_next_oflow += timer_a_step;\r
+\r
+ if ((mode_old ^ mode_new) & 1) // turning on/off\r
+ {\r
+ if (mode_old & 1) {\r
+ timer_a_offset = timer_a_next_oflow - xcycles;\r
+ timer_a_next_oflow = 0x70000000;\r
+ }\r
+ else\r
+ timer_a_next_oflow = xcycles + timer_a_offset;\r
+ }\r
+ if (mode_new & 1)\r
+ elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r
+\r
+ /* update timer b */\r
+ if (mode_old & 2)\r
+ while (xcycles >= timer_b_next_oflow)\r
+ timer_b_next_oflow += timer_b_step;\r
+\r
+ if ((mode_old ^ mode_new) & 2)\r
+ {\r
+ if (mode_old & 2) {\r
+ timer_b_offset = timer_b_next_oflow - xcycles;\r
+ timer_b_next_oflow = 0x70000000;\r
+ }\r
+ else\r
+ timer_b_next_oflow = xcycles + timer_b_offset;\r
+ }\r
+ if (mode_new & 2)\r
+ elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r
}\r
\r
-void m68k_write_memory_8(unsigned int address, unsigned int value)\r
+// ym2612 DAC and timer I/O handlers for z80\r
+int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
{\r
- if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
+ int addr;\r
+\r
+ a &= 3;\r
+ if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r
+ {\r
+ int scanline = get_scanline(is_from_z80);\r
+ //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
+ ym2612.dacout = ((int)d - 0x80) << 6;\r
+ if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r
+ PsndDoDAC(scanline);\r
+ return 0;\r
+ }\r
+\r
+ switch (a)\r
+ {\r
+ case 0: /* address port 0 */\r
+ ym2612.OPN.ST.address = d;\r
+ ym2612.addr_A1 = 0;\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
+#endif\r
+ return 0;\r
+\r
+ case 1: /* data port 0 */\r
+ if (ym2612.addr_A1 != 0)\r
+ return 0;\r
+\r
+ addr = ym2612.OPN.ST.address;\r
+ ym2612.REGS[addr] = d;\r
+\r
+ switch (addr)\r
+ {\r
+ case 0x24: // timer A High 8\r
+ case 0x25: { // timer A Low 2\r
+ int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r
+ : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r
+ if (ym2612.OPN.ST.TA != TAnew)\r
+ {\r
+ //elprintf(EL_STATUS, "timer a set %i", TAnew);\r
+ ym2612.OPN.ST.TA = TAnew;\r
+ ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r
+ //ym2612.OPN.ST.TAT = 0;\r
+ //\r
+ timer_a_step = timer_a_offset = 16466 * (1024 - TAnew);\r
+ if (ym2612.OPN.ST.mode & 1) {\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
+ }\r
+ elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
+ }\r
+ return 0;\r
+ }\r
+ case 0x26: // timer B\r
+ if (ym2612.OPN.ST.TB != d) {\r
+ //elprintf(EL_STATUS, "timer b set %i", d);\r
+ ym2612.OPN.ST.TB = d;\r
+ ym2612.OPN.ST.TBC = (256-d) * 288;\r
+ //ym2612.OPN.ST.TBT = 0;\r
+ timer_b_step = timer_b_offset = 262800 * (256 - d); // 262881\r
+ if (ym2612.OPN.ST.mode & 2) {\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
+ }\r
+ elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
+ }\r
+ return 0;\r
+ case 0x27: { /* mode, timer control */\r
+ int old_mode = ym2612.OPN.ST.mode;\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ ym2612.OPN.ST.mode = d;\r
+\r
+ elprintf(EL_YMTIMER, "st mode %02x", d);\r
+ ym2612_sync_timers(cycles, old_mode, d);\r
+\r
+ /* reset Timer a flag */\r
+ if (d & 0x10)\r
+ ym2612.OPN.ST.status &= ~1;\r
+\r
+ /* reset Timer b flag */\r
+ if (d & 0x20)\r
+ ym2612.OPN.ST.status &= ~2;\r
+\r
+ if ((d ^ old_mode) & 0xc0) {\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, get_scanline(is_from_z80));\r
+#endif\r
+ return 1;\r
+ }\r
+ return 0;\r
+ }\r
+ case 0x2b: { /* DAC Sel (YM2612) */\r
+ int scanline = get_scanline(is_from_z80);\r
+ ym2612.dacen = d & 0x80;\r
+ if (d & 0x80) PsndDacLine = scanline;\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
+#endif\r
+ return 0;\r
+ }\r
+ }\r
+ break;\r
+\r
+ case 2: /* address port 1 */\r
+ ym2612.OPN.ST.address = d;\r
+ ym2612.addr_A1 = 1;\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
+#endif\r
+ return 0;\r
+\r
+ case 3: /* data port 1 */\r
+ if (ym2612.addr_A1 != 1)\r
+ return 0;\r
+\r
+ addr = ym2612.OPN.ST.address | 0x100;\r
+ ym2612.REGS[addr] = d;\r
+ break;\r
+ }\r
+\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM)\r
+ return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
+#endif\r
+ return YM2612Write_(a, d);\r
}\r
\r
-void m68k_write_memory_16(unsigned int address, unsigned int value)\r
+\r
+#define ym2612_read_local() \\r
+ if (xcycles >= timer_a_next_oflow) \\r
+ ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r
+ if (xcycles >= timer_b_next_oflow) \\r
+ ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
+\r
+u32 ym2612_read_local_z80(void)\r
{\r
- if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
+ int xcycles = z80_cyclesDone() << 8;\r
+\r
+ ym2612_read_local();\r
+\r
+ elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
+ timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
+ return ym2612.OPN.ST.status;\r
}\r
\r
-void m68k_write_memory_32(unsigned int address, unsigned int value)\r
+u32 ym2612_read_local_68k(void)\r
{\r
- if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
+ int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
+\r
+ ym2612_read_local();\r
+\r
+ elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
+ timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
+ return ym2612.OPN.ST.status;\r
}\r
+\r
+void ym2612_pack_state(void)\r
+{\r
+ // TODO timers\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM)\r
+ /*YM2612PicoStateSave2_940(0, 0)*/;\r
+ else\r
#endif\r
-#endif // EMU_M68K\r
+ YM2612PicoStateSave2(0, 0);\r
+}\r
+\r
+void ym2612_unpack_state(void)\r
+{\r
+ int i, ret, tat, tbt;\r
+ YM2612PicoStateLoad();\r
+\r
+ // feed all the registers and update internal state\r
+ for (i = 0x20; i < 0xB8; i++) {\r
+ ym2612_write_local(0, i, 0);\r
+ ym2612_write_local(1, ym2612.REGS[i], 0);\r
+ }\r
+ for (i = 0x30; i < 0xB8; i++) {\r
+ ym2612_write_local(2, i, 0);\r
+ ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
+ }\r
\r
+#ifdef __GP2X__\r
+ if (PicoOpt & POPT_EXT_FM)\r
+ /*ret = YM2612PicoStateLoad2_940(&tat, &tbt)*/;\r
+ else\r
+#endif\r
+ ret = YM2612PicoStateLoad2(&tat, &tbt);\r
+}\r
\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if (PicoOpt&1) ret = (u8) YM2612Read();\r
+ if (PicoOpt&POPT_EN_FM) ret = ym2612_read_local_z80();\r
return ret;\r
}\r
\r
addr68k=Pico.m.z80_bank68k<<15;\r
addr68k+=a&0x7fff;\r
\r
- if (PicoMCD & 1)\r
+ if (addr68k < Pico.romsize) { ret = Pico.rom[addr68k^1]; goto bnkend; }\r
+ elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r
+ if (PicoAHW & PAHW_MCD)\r
ret = PicoReadM68k8(addr68k);\r
else ret = PicoRead8(addr68k);\r
+bnkend:\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
return ret;\r
}\r
{\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;\r
+ if(PicoOpt&POPT_EN_FM) emustatus|=ym2612_write_local(a, data, 1) & 1;\r
return;\r
}\r
\r
if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
{\r
- if(PicoOpt&2) SN76496Write(data);\r
+ if(PicoOpt&POPT_EN_PSG) SN76496Write(data);\r
return;\r
}\r
\r
addr68k=Pico.m.z80_bank68k<<15;\r
addr68k+=a&0x7fff;\r
elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
- if (PicoMCD & 1)\r
+ if (PicoAHW & PAHW_MCD)\r
PicoWriteM68k8(addr68k, data);\r
else PicoWrite8(addr68k, data);\r
return;\r
notaz.gp2x.de / picodrive.git / blobdiff