@ memory handlers with banking support for SSF II - The New Challengers\r
@ mostly based on Gens code\r
\r
-@ (c) Copyright 2006, notaz\r
+@ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas\r
@ All Rights Reserved\r
\r
\r
mov r0, r0, lsr #8\r
orr r0, r0, r1, lsl #8\r
bx lr\r
+\r
m_read16_nosram:\r
ldr r1, [r3, #4] @ 1ci\r
cmp r0, r1\r
bic r0, r0, #1\r
mov r1, #16\r
b OtherRead16\r
-@ ldr r2, =OtherRead16\r
-@ bx r2\r
\r
m_read16_vdp:\r
tst r0, #0x70000\r
bxne lr @ invalid read\r
bic r0, r0, #1\r
b PicoVideoRead\r
-@ ldr r1, =PicoVideoRead\r
-@ bx r1\r
\r
m_read16_ram:\r
ldr r1, =Pico\r
bic r0, r0, #1\r
mov r1, #16\r
b OtherRead16End\r
-@ ldr r2, =OtherRead16End\r
-@ bx r2\r
\r
.pool\r
\r
and r1, r1, #0xff\r
orr r0, r0, r1, lsl #8\r
bx lr\r
+\r
m_read32_nosram:\r
ldr r1, [r3, #4] @ (1ci)\r
cmp r0, r1\r
\r
@ sram register\r
ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg\r
+ ldrb r0, [r2]\r
and r1, r1, #3\r
- strb r1, [r2]\r
+ bic r0, r0, #3\r
+ orr r0, r0, r1\r
+ strb r0, [r2]\r
bx lr\r
\r
pwr_banking:\r
str r12, [r2, r0, lsl #2]\r
\r
bx lr\r
+\r