sram handling refactored

[picodrive.git] / Pico / Memory.s

diff --git a/Pico/Memory.s b/Pico/Memory.s
index 4208fec..88b8c43 100644 (file)
--- a/Pico/Memory.s
+++ b/Pico/Memory.s
@@ -40,8 +40,8 @@ m_read8_def_table:
     .long   m_read_null     @ 0xB80000 - 0xBFFFFF\r
     .long   m_read8_vdp     @ 0xC00000 - 0xC7FFFF\r
     .long   m_read8_vdp     @ 0xC80000 - 0xCFFFFF\r
-    .long   m_read_null     @ 0xD00000 - 0xD7FFFF\r
-    .long   m_read_null     @ 0xD80000 - 0xDFFFFF\r
+    .long   m_read8_vdp     @ 0xD00000 - 0xD7FFFF\r
+    .long   m_read8_vdp     @ 0xD80000 - 0xDFFFFF\r
     .long   m_read8_ram     @ 0xE00000 - 0xE7FFFF\r
     .long   m_read8_ram     @ 0xE80000 - 0xEFFFFF\r
     .long   m_read8_ram     @ 0xF00000 - 0xF7FFFF\r
@@ -73,9 +73,9 @@ m_read16_def_table:
     .long   m_read_null      @ 0xB00000 - 0xB7FFFF\r
     .long   m_read_null      @ 0xB80000 - 0xBFFFFF\r
     .long   m_read16_vdp     @ 0xC00000 - 0xC7FFFF\r
-    .long   m_read_null      @ 0xC80000 - 0xCFFFFF\r
-    .long   m_read_null      @ 0xD00000 - 0xD7FFFF\r
-    .long   m_read_null      @ 0xD80000 - 0xDFFFFF\r
+    .long   m_read16_vdp     @ 0xC80000 - 0xCFFFFF\r
+    .long   m_read16_vdp     @ 0xD00000 - 0xD7FFFF\r
+    .long   m_read16_vdp     @ 0xD80000 - 0xDFFFFF\r
     .long   m_read16_ram     @ 0xE00000 - 0xE7FFFF\r
     .long   m_read16_ram     @ 0xE80000 - 0xEFFFFF\r
     .long   m_read16_ram     @ 0xF00000 - 0xF7FFFF\r
@@ -107,9 +107,9 @@ m_read32_def_table:
     .long   m_read_null      @ 0xB00000 - 0xB7FFFF\r
     .long   m_read_null      @ 0xB80000 - 0xBFFFFF\r
     .long   m_read32_vdp     @ 0xC00000 - 0xC7FFFF\r
-    .long   m_read_null      @ 0xC80000 - 0xCFFFFF\r
-    .long   m_read_null      @ 0xD00000 - 0xD7FFFF\r
-    .long   m_read_null      @ 0xD80000 - 0xDFFFFF\r
+    .long   m_read32_vdp     @ 0xC80000 - 0xCFFFFF\r
+    .long   m_read32_vdp     @ 0xD00000 - 0xD7FFFF\r
+    .long   m_read32_vdp     @ 0xD80000 - 0xDFFFFF\r
     .long   m_read32_ram     @ 0xE00000 - 0xE7FFFF\r
     .long   m_read32_ram     @ 0xE80000 - 0xEFFFFF\r
     .long   m_read32_ram     @ 0xF00000 - 0xF7FFFF\r
@@ -284,31 +284,14 @@ m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area
     orr     r0, r0, #0x200000\r
     cmp     r0, r1\r
     bgt     m_read8_nosram\r
-    ldr     r1, [r2, #4]    @ SRam.start (1ci)\r
+    ldr     r1, [r2, #4]    @ SRam.start\r
     cmp     r0, r1\r
     blt     m_read8_nosram\r
-    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg (1ci)\r
-    sub     r12,r0, #0x200000\r
-    tst     r1, #0x10\r
-    bne     m_read8_detected\r
-    cmp     r12,#1\r
-    ble     m_read8_detected\r
-    tst     r1, #1\r
-    orrne   r1, r1, #0x10\r
-    strneb  r1, [r3, #0x11]\r
-m_read8_detected:\r
-    tst     r1, #4          @ EEPROM read?\r
-    bne     SRAMReadEEPROM\r
-m_read8_noteeprom:\r
-    tst     r1, #1\r
-    beq     m_read8_nosram\r
-    ldr     r3, [r2]        @ SRam.data\r
-    ldr     r2, [r2, #4]    @ SRam.start (1ci)\r
-    sub     r3, r3, r2\r
-    ldrb    r0, [r3, r0]\r
-    bx      lr\r
+    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg\r
+    tst     r1, #5\r
+    bne     SRAMRead\r
 m_read8_nosram:\r
-    ldr     r1, [r3, #4]    @ 1ci\r
+    ldr     r1, [r3, #4]    @ romsize\r
     cmp     r0, r1\r
     movgt   r0, #0\r
     bxgt    lr              @ bad location\r
@@ -499,22 +482,18 @@ m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95)
     orr     r0, r0, #0x200000\r
     cmp     r0, r1\r
     bgt     m_read16_nosram\r
-    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)\r
-    tst     r1, #1\r
-    beq     m_read16_nosram\r
-    ldr     r1, [r2, #4]    @ SRam.start (1ci)\r
+    ldr     r1, [r2, #4]    @ SRam.start\r
     cmp     r0, r1\r
     blt     m_read16_nosram\r
-    ldr     r2, [r2]        @ SRam.data (1ci)\r
-    sub     r2, r2, r1\r
-    ldrh    r0, [r2, r0]    @ 2ci\r
-    and     r1, r0, #0xff\r
-    mov     r0, r0, lsr #8\r
-    orr     r0, r0, r1, lsl #8\r
-    bx      lr\r
-\r
+    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg\r
+    tst     r1, #5\r
+    beq     m_read16_nosram\r
+    stmfd   sp!,{lr}\r
+    bl      SRAMRead\r
+    orr     r0, r0, r0, lsl #8\r
+    ldmfd   sp!,{pc}\r
 m_read16_nosram:\r
-    ldr     r1, [r3, #4]    @ 1ci\r
+    ldr     r1, [r3, #4]    @ romsize\r
     cmp     r0, r1\r
     movgt   r0, #0\r
     bxgt    lr              @ bad location\r
@@ -573,7 +552,7 @@ m_read16_misc:
     b       OtherRead16\r
 \r
 m_read16_vdp:\r
-    tst     r0, #0x70000\r
+    tst     r0, #0x70000    @ if ((a&0xe700e0)==0xc00000)\r
     tsteq   r0, #0x000e0\r
     bxne    lr              @ invalid read\r
     bic     r0, r0, #1\r
@@ -631,26 +610,24 @@ m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?)
     orr     r0, r0, #0x200000\r
     cmp     r0, r1\r
     bgt     m_read32_nosram\r
-    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)\r
-    tst     r1, #1\r
-    beq     m_read32_nosram\r
-    ldr     r1, [r2, #4]    @ SRam.start (1ci)\r
+    ldr     r1, [r2, #4]    @ SRam.start\r
     cmp     r0, r1\r
     blt     m_read32_nosram\r
-    ldr     r2, [r2]        @ SRam.data (1ci)\r
-    sub     r2, r2, r1\r
-    ldrh    r0, [r2, r0]!   @ (1ci)\r
-    ldrh    r1, [r2, #2]\r
-    orr     r0, r0, r0, lsl #16\r
-    mov     r0, r0, ror #8\r
-    mov     r0, r0, lsl #16\r
-    orr     r0, r0, r1, lsr #8\r
-    and     r1, r1, #0xff\r
-    orr     r0, r0, r1, lsl #8\r
+    ldrb    r1, [r3, #0x11] @ Pico.m.sram_reg\r
+    tst     r1, #5\r
+    beq     m_read32_nosram\r
+    stmfd   sp!,{r0,lr}\r
+    bl      SRAMRead\r
+    ldmfd   sp!,{r1,lr}\r
+    stmfd   sp!,{r0,lr}\r
+    add     r0, r1, #2\r
+    bl      SRAMRead\r
+    ldmfd   sp!,{r1,lr}\r
+    orr     r0, r1, r0, lsl #16\r
+    orr     r0, r0, r0, lsl #8\r
     bx      lr\r
-\r
 m_read32_nosram:\r
-    ldr     r1, [r3, #4]    @ (1ci)\r
+    ldr     r1, [r3, #4]    @ romsize\r
     cmp     r0, r1\r
     movgt   r0, #0\r
     bxgt    lr              @ bad location\r