@ All Rights Reserved\r
\r
\r
+.include "port_config.s"\r
\r
.text\r
\r
.global PicoRead8\r
.global PicoRead16\r
.global PicoRead32\r
+.global PicoWrite8\r
.global PicoWriteRomHW_SSF2\r
+.global m_m68k_read8_misc\r
+.global m_m68k_write8_misc\r
\r
\r
PicoMemReset:\r
m_read8_rom13: @ 0x980000 - 0x9fffff\r
m_read8_rom 0x13\r
\r
+\r
+m_m68k_read8_misc:\r
m_read8_misc:\r
- bic r2, r0, #0x00ff\r
- bic r2, r2, #0xbf00\r
- cmp r2, #0xa00000 @ Z80 RAM?\r
- ldreq r2, =z80Read8\r
+ bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
+ cmp r2, #0xa10000 @ so check for it first\r
+ bne m_read8_misc2\r
+m_read8_misc_io:\r
+ ands r0, r0, #0x1e\r
+ beq m_read8_misc_hwreg\r
+ cmp r0, #4\r
+ ldrle r2, =PadRead\r
+ movlt r0, #0\r
+ moveq r0, #1\r
+ bxle r2\r
+ ldr r3, =(Pico+0x22000)\r
+ mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])\r
+ ldrb r0, [r3, r0]\r
+ bx lr\r
+\r
+m_read8_misc_hwreg:\r
+ ldr r3, =(Pico+0x22200)\r
+ ldrb r0, [r3, #0x0f] @ Pico.m.hardware\r
+ bx lr\r
+\r
+m_read8_misc2:\r
+ mov r2, #0xa10000 @ games also like to poll busreq,\r
+ orr r2, r2, #0x001100 @ so we'll try it now\r
+ cmp r0, r2\r
+ ldreq r2, =z80ReadBusReq\r
+ bxeq r2\r
+\r
+ and r2, r0, #0xff0000 @ finally it might be\r
+ cmp r2, #0xa00000 @ z80 area\r
+ bne m_read8_misc3\r
+ tst r0, #0x4000\r
+ ldreq r2, =z80Read8 @ z80 RAM\r
bxeq r2\r
+ and r2, r0, #0x6000\r
+ cmp r2, #0x4000\r
+ mvnne r0, #0\r
+ bxne lr @ invalid\r
+.if EXTERNAL_YM2612\r
+ ldr r1, =PicoOpt\r
+ ldr r1, [r1]\r
+ tst r1, #1\r
+ beq m_read8_fake_ym2612\r
+ tst r1, #0x200\r
+ ldreq r2, =YM2612Read_\r
+ ldrne r2, =YM2612Read_940\r
+.else\r
+ ldr r2, =YM2612Read_\r
+.endif\r
+ bx r2 @ ym2612\r
+\r
+m_read8_fake_ym2612:\r
+ ldr r3, =(Pico+0x22200)\r
+ ldrb r0, [r3, #8] @ Pico.m.rotate\r
+ add r1, r0, #1\r
+ strb r1, [r3, #8]\r
+ and r0, r0, #3\r
+ bx lr\r
+\r
+m_read8_misc3:\r
+ @ if everything else fails, use generic handler\r
stmfd sp!,{r0,lr}\r
bic r0, r0, #1\r
mov r1, #8\r
moveq r0, r0, lsr #8\r
bx lr\r
\r
+\r
m_read8_vdp:\r
tst r0, #0x70000\r
tsteq r0, #0x000e0\r
\r
bx lr\r
\r
+@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
+\r
+@ Here we only handle most often used locations,\r
+@ everything else is passed to generic handlers\r
+\r
+PicoWrite8: @ u32 a, u8 d\r
+ bic r0, r0, #0xff000000\r
+ and r2, r0, #0x00e00000\r
+ cmp r2, #0x00e00000 @ RAM?\r
+ ldr r3, =Pico\r
+ biceq r0, r0, #0x00ff0000\r
+ eoreq r0, r0, #1\r
+ streqb r1, [r3, r0]\r
+ bxeq lr\r
+\r
+m_m68k_write8_misc:\r
+ bic r2, r0, #0x1f @ most commonly we get i/o port write,\r
+ cmp r2, #0xa10000 @ so check for it first\r
+ bne m_write8_misc2\r
+m_write8_io:\r
+ ldr r2, =PicoOpt\r
+ and r0, r0, #0x1e\r
+ ldr r2, [r2]\r
+ ldr r3, =(Pico+0x22000) @ Pico.ioports\r
+ tst r2, #0x20 @ 6 button pad?\r
+ streqb r1, [r3, r0, lsr #1]\r
+ bxeq lr\r
+ cmp r0, #2\r
+ cmpne r0, #4\r
+ bne m_write8_io_done @ not likely to happen\r
+ add r2, r3, #0x200 @ Pico+0x22200\r
+ mov r12,#0\r
+ cmp r0, #2\r
+ streqb r12,[r2,#0x18]\r
+ strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0\r
+ tst r1, #0x40 @ TH\r
+ beq m_write8_io_done\r
+ ldrb r12,[r3, r0, lsr #1]\r
+ tst r12,#0x40\r
+ bne m_write8_io_done\r
+ cmp r0, #2\r
+ ldreqb r12,[r2,#0x0a]\r
+ ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
+ add r12,r12,#1\r
+ streqb r12,[r2,#0x0a]\r
+ strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
+m_write8_io_done:\r
+ strb r1, [r3, r0, lsr #1]\r
+ bx lr\r
+\r
+\r
+m_write8_misc2:\r
+ and r2, r0, #0xff0000\r
+ cmp r2, #0xa00000 @ z80 area?\r
+ bne m_write8_not_z80\r
+ tst r0, #0x4000\r
+ bne m_write8_z80_not_ram\r
+ ldr r3, =(Pico+0x20000) @ Pico.zram\r
+ add r2, r3, #0x02200 @ Pico+0x22200\r
+ ldrb r2, [r2, #9] @ Pico.m.z80Run\r
+ bic r0, r0, #0xff0000\r
+ bic r0, r0, #0x00e000\r
+ tst r2, #1\r
+ streqb r1, [r3, r0] @ zram\r
+ bx lr\r
+\r
+m_write8_z80_not_ram:\r
+ and r2, r0, #0x6000\r
+ cmp r2, #0x4000\r
+ bne m_write8_z80_not_ym2612\r
+ ldr r2, =PicoOpt\r
+ and r0, r0, #3\r
+ ldr r2, [r2]\r
+ tst r2, #1\r
+ bxeq lr\r
+ stmfd sp!,{lr}\r
+.if EXTERNAL_YM2612\r
+ tst r2, #0x200\r
+ ldreq r2, =YM2612Write_\r
+ ldrne r2, =YM2612Write_940\r
+ mov lr, pc\r
+ bx r2\r
+.else\r
+ bl YM2612Write_\r
+.endif\r
+ ldr r2, =emustatus\r
+ ldmfd sp!,{lr}\r
+ ldr r1, [r2]\r
+ orr r1, r0, r2\r
+ str r1, [r2] @ emustatus|=YM2612Write(a&3, d);\r
+ bx lr\r
+\r
+m_write8_z80_not_ym2612: @ not too likely\r
+ mov r2, r0, lsl #17\r
+ bic r2, r2, #6<<17\r
+ mov r3, #0x7f00\r
+ orr r3, r3, #0x0011\r
+ cmp r3, r2, lsr #17 @ psg @ z80 area?\r
+ beq m_write8_psg\r
+ and r2, r0, #0x7f00\r
+ cmp r2, #0x6000 @ bank register?\r
+ bxne lr @ invalid write\r
+\r
+m_write8_z80_bank_reg:\r
+ ldr r3, =(Pico+0x22208) @ Pico.m\r
+ ldrh r2, [r3, #0x0a]\r
+ mov r1, r1, lsr #8\r
+ orr r2, r1, r2, lsr #1\r
+ bic r2, r2, #0xfe00\r
+ strh r2, [r3, #0x0a]\r
+ bx lr\r
+\r
+\r
+m_write8_not_z80:\r
+ and r2, r0, #0xe70000\r
+ cmp r2, #0xc00000 @ VDP area?\r
+ bne m_write8_misc4\r
+ and r2, r0, #0xf9\r
+ cmp r2, #0x11\r
+ bne m_write8_misc4\r
+m_write8_psg:\r
+ ldr r2, =PicoOpt\r
+ mov r0, r1\r
+ ldr r2, [r2]\r
+ tst r2, #2\r
+ bxeq lr\r
+ ldr r2, =SN76496Write\r
+ bx r2\r
+ \r
+\r
+m_write8_misc4:\r
+ @ passthrough\r
+ ldr r2, =OtherWrite8\r
+ bx r2\r
+\r
notaz.gp2x.de / picodrive.git / blobdiff